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2020-12-24perf stat aggregation: Add separate die memberJames Clark5-36/+26
Add die as a separate member so that it doesn't have to be packed into the int value. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf stat aggregation: Add separate socket memberJames Clark6-51/+41
Add socket as a separate member so that it doesn't have to be packed into the int value. When the socket ID was larger than 8 bits the output appeared corrupted or incomplete. For example, here on ThunderX2 'perf stat' reports a socket of -1 and an invalid die number: ./perf stat -a --per-die The socket id number is too big. Performance counter stats for 'system wide': S-1-D255 128 687.99 msec cpu-clock # 57.240 CPUs utilized ... S36-D0 128 842.34 msec cpu-clock # 70.081 CPUs utilized ... And with --per-core there is an entry with an invalid core ID: ./perf stat record -a --per-core The socket id number is too big. Performance counter stats for 'system wide': S-1-D255-C65535 128 671.04 msec cpu-clock # 54.112 CPUs utilized ... S36-D0-C0 4 28.27 msec cpu-clock # 2.279 CPUs utilized ... This fixes the "Session topology" self test on ThunderX2. After this fix the output contains the correct socket and die IDs and no longer prints a warning about the size of the socket ID: ./perf stat --per-die -a Performance counter stats for 'system wide': S36-D0 128 169,869.39 msec cpu-clock # 127.501 CPUs utilized ... S3612-D0 128 169,733.05 msec cpu-clock # 127.398 CPUs utilized Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf stat aggregation: Add separate node memberJames Clark5-8/+21
Add node as a separate member so that it doesn't have to be packed into the int value. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf stat aggregation: Start using cpu_aggr_id in mapJames Clark4-11/+11
Use the new cpu_aggr_id struct in the cpu map instead of int so that it can store more data. No functional changes. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf cpumap: Drop in cpu_aggr_map structJames Clark4-20/+35
Replace usages of perf_cpu_map with cpu_aggr map in places that are involved with 'perf stat' aggregation. This will then later be changed to be a map of cpu_aggr_id rather than an int so that more data can be stored. No functional changes. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: John Garry <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf cpumap: Add new map type for aggregationJames Clark2-0/+25
Currently this is a duplicate of perf_cpu_map so that it can be used as a drop in replacement. In a later commit it will be changed from a map of ints to use the new cpu_aggr_id struct. No functional changes. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf stat: Replace aggregation ID with a structJames Clark7-127/+173
Replace all occurences of the usage of int with the new struct cpu_aggr_id. No functional changes. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf cpumap: Add new struct for cpu aggregationJames Clark2-0/+26
This struct currently has only a single int member so that it can be used as a drop in replacement for the existing behaviour. Comparison and constructor functions have also been added that will replace usages of '==' and '= -1'. No functional changes. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf cpumap: Use existing allocator to avoid using mallocJames Clark1-4/+4
Use the existing allocator for perf_cpu_map to avoid use of raw malloc. This could cause an issue in later commits where the size of perf_cpu_map is changed. No functional changes. Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf tests: Improve topology test to check all aggregation typesJames Clark1-7/+46
Improve the topology test to check all aggregation types. This is to lock down the behaviour before 'id' is changed into a struct in later commits. Committer testing: $ perf test topology 41: Session topology: Ok $ $ perf test -v topology 41: Session topology: --- start --- test child forked, pid 965552 templ file: /tmp/perf-test-mO7NtI Problems creating module maps, continuing anyway... CPU 0, core 0, socket 0 CPU 1, core 1, socket 0 CPU 2, core 2, socket 0 CPU 3, core 4, socket 0 CPU 4, core 5, socket 0 CPU 5, core 6, socket 0 CPU 6, core 8, socket 0 CPU 7, core 9, socket 0 CPU 8, core 10, socket 0 CPU 9, core 12, socket 0 CPU 10, core 13, socket 0 CPU 11, core 14, socket 0 CPU 12, core 0, socket 0 CPU 13, core 1, socket 0 CPU 14, core 2, socket 0 CPU 15, core 4, socket 0 CPU 16, core 5, socket 0 CPU 17, core 6, socket 0 CPU 18, core 8, socket 0 CPU 19, core 9, socket 0 CPU 20, core 10, socket 0 CPU 21, core 12, socket 0 CPU 22, core 13, socket 0 CPU 23, core 14, socket 0 test child finished with 0 ---- end ---- Session topology: Ok $ Signed-off-by: James Clark <[email protected]> Acked-by: Namhyung Kim <[email protected]> Acked-by: Jiri Olsa <[email protected]> Tested-by: Arnaldo Carvalho de Melo <[email protected]> Tested-by: John Garry <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Richter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf tools: Update s390's syscall.tbl copy from the kernel sourcesTiezhu Yang1-170/+226
This silences the following tools/perf/ build warning: Warning: Kernel ABI header at 'tools/perf/arch/s390/entry/syscalls/syscall.tbl' differs from latest version at 'arch/s390/kernel/syscalls/syscall.tbl' Just make them same: cp arch/s390/kernel/syscalls/syscall.tbl tools/perf/arch/s390/entry/syscalls/syscall.tbl Signed-off-by: Tiezhu Yang <[email protected]> Reviewed-by: Naveen N. Rao <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Xuefeng Li <[email protected]> Link: http://lore.kernel.org/lkml/[email protected] [ There were updates after Tiezhu's post, so I just updated the copy ] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf tools: Update powerpc's syscall.tbl copy from the kernel sourcesTiezhu Yang1-7/+19
This silences the following tools/perf/ build warning: Warning: Kernel ABI header at 'tools/perf/arch/powerpc/entry/syscalls/syscall.tbl' differs from latest version at 'arch/powerpc/kernel/syscalls/syscall.tbl' Just make them same: cp arch/powerpc/kernel/syscalls/syscall.tbl tools/perf/arch/powerpc/entry/syscalls/syscall.tbl Signed-off-by: Tiezhu Yang <[email protected]> Reviewed-by: Naveen N. Rao <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Xuefeng Li <[email protected]> Link: http://lore.kernel.org/lkml/[email protected] [ There were updates after Tiezhu's post, so I just updated the copy ] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf s390: Move syscall.tbl check into check-headers.shTiezhu Yang2-4/+1
It is better to check syscall.tbl for s390 in check-headers.sh, it is similar with commit c9b51a017065 ("perf tools: Move syscall_64.tbl check into check-headers.sh"). Signed-off-by: Tiezhu Yang <[email protected]> Reviewed-by: Naveen N. Rao <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Xuefeng Li <[email protected]> Link: http://lore.kernel.org/lkml/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24perf powerpc: Move syscall.tbl check to check-headers.shTiezhu Yang2-7/+1
It is better to check syscall.tbl for powerpc in check-headers.sh, it is similar with commit c9b51a017065 ("perf tools: Move syscall_64.tbl check into check-headers.sh"). Signed-off-by: Tiezhu Yang <[email protected]> Reviewed-by: Naveen N. Rao <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Xuefeng Li <[email protected]> Link: http://lore.kernel.org/lkml/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24tools headers UAPI: Synch KVM's svm.h header with the kernelArnaldo Carvalho de Melo1-0/+28
To pick up the changes from: d1949b93c60504b3 ("KVM: SVM: Add support for CR8 write traps for an SEV-ES guest") 5b51cb13160ae0ba ("KVM: SVM: Add support for CR4 write traps for an SEV-ES guest") f27ad38aac23263c ("KVM: SVM: Add support for CR0 write traps for an SEV-ES guest") 2985afbcdbb1957a ("KVM: SVM: Add support for EFER write traps for an SEV-ES guest") 291bd20d5d88814a ("KVM: SVM: Add initial support for a VMGEXIT VMEXIT") Picking these new SVM exit reasons: + { SVM_EXIT_EFER_WRITE_TRAP, "write_efer_trap" }, \ + { SVM_EXIT_CR0_WRITE_TRAP, "write_cr0_trap" }, \ + { SVM_EXIT_CR4_WRITE_TRAP, "write_cr4_trap" }, \ + { SVM_EXIT_CR8_WRITE_TRAP, "write_cr8_trap" }, \ + { SVM_EXIT_VMGEXIT, "vmgexit" }, \ + { SVM_VMGEXIT_MMIO_READ, "vmgexit_mmio_read" }, \ + { SVM_VMGEXIT_MMIO_WRITE, "vmgexit_mmio_write" }, \ + { SVM_VMGEXIT_NMI_COMPLETE, "vmgexit_nmi_complete" }, \ + { SVM_VMGEXIT_AP_HLT_LOOP, "vmgexit_ap_hlt_loop" }, \ + { SVM_VMGEXIT_AP_JUMP_TABLE, "vmgexit_ap_jump_table" }, \ And address this perf build warning: Warning: Kernel ABI header at 'tools/arch/x86/include/uapi/asm/svm.h' differs from latest version at 'arch/x86/include/uapi/asm/svm.h' diff -u tools/arch/x86/include/uapi/asm/svm.h arch/x86/include/uapi/asm/svm.h Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Paolo Bonzini <[email protected]> Cc: Tom Lendacky <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24tools kvm headers: Update KVM headers from the kernel sourcesArnaldo Carvalho de Melo1-3/+0
To pick the changes from: 8d14797b53f044fd ("KVM: arm64: Move 'struct kvm_arch_memory_slot' out of uapi/") That don't causes any changes in tooling, only addresses this perf build warning: Warning: Kernel ABI header at 'tools/arch/arm64/include/uapi/asm/kvm.h' differs from latest version at 'arch/arm64/include/uapi/asm/kvm.h' diff -u tools/arch/arm64/include/uapi/asm/kvm.h arch/arm64/include/uapi/asm/kvm.h Cc: Marc Zyngier <[email protected]> Cc: Will Deacon <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24tools headers UAPI: Sync KVM's vmx.h header with the kernel sourcesArnaldo Carvalho de Melo1-0/+2
To pick the changes in: bf0cd88ce363a2de ("KVM: x86: emulate wait-for-SIPI and SIPI-VMExit") That makes 'perf kvm-stat' aware of this new SIPI_SIGNAL exit reason, thus addressing the following perf build warning: Warning: Kernel ABI header at 'tools/arch/x86/include/uapi/asm/vmx.h' differs from latest version at 'arch/x86/include/uapi/asm/vmx.h' diff -u tools/arch/x86/include/uapi/asm/vmx.h arch/x86/include/uapi/asm/vmx.h Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Paolo Bonzini <[email protected]> Cc: Yadong Qi <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24tools headers UAPI: Sync kvm.h headers with the kernel sourcesArnaldo Carvalho de Melo2-1/+56
To pick the changes in: fb04a1eddb1a65b6 ("KVM: X86: Implement ring-based dirty memory tracking") That result in these change in tooling: $ tools/perf/trace/beauty/kvm_ioctl.sh > before $ cp include/uapi/linux/kvm.h tools/include/uapi/linux/kvm.h $ cp arch/x86/include/uapi/asm/kvm.h tools/arch/x86/include/uapi/asm/kvm.h $ tools/perf/trace/beauty/kvm_ioctl.sh > after $ diff -u before after --- before 2020-12-21 11:55:45.229737066 -0300 +++ after 2020-12-21 11:55:56.379983393 -0300 @@ -90,6 +90,7 @@ [0xc0] = "CLEAR_DIRTY_LOG", [0xc1] = "GET_SUPPORTED_HV_CPUID", [0xc6] = "X86_SET_MSR_FILTER", + [0xc7] = "RESET_DIRTY_RINGS", [0xe0] = "CREATE_DEVICE", [0xe1] = "SET_DEVICE_ATTR", [0xe2] = "GET_DEVICE_ATTR", $ Now one can use that string in filters when tracing ioctls, etc. And silences this perf build warning: Warning: Kernel ABI header at 'tools/include/uapi/linux/kvm.h' differs from latest version at 'include/uapi/linux/kvm.h' diff -u tools/include/uapi/linux/kvm.h include/uapi/linux/kvm.h Warning: Kernel ABI header at 'tools/arch/x86/include/uapi/asm/kvm.h' differs from latest version at 'arch/x86/include/uapi/asm/kvm.h' diff -u tools/arch/x86/include/uapi/asm/kvm.h arch/x86/include/uapi/asm/kvm.h Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Paolo Bonzini <[email protected]> Cc: Peter Xu <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24tools arch x86: Sync the msr-index.h copy with the kernel sourcesArnaldo Carvalho de Melo2-1/+2
To pick up the changes in: Fixes: 69372cf01290b958 ("x86/cpu: Add VM page flush MSR availablility as a CPUID feature") That cause these changes in tooling: $ tools/perf/trace/beauty/tracepoints/x86_msr.sh > before $ cp arch/x86/include/asm/msr-index.h tools/arch/x86/include/asm/msr-index.h $ tools/perf/trace/beauty/tracepoints/x86_msr.sh > after $ diff -u before after --- before 2020-12-21 09:09:05.593005003 -0300 +++ after 2020-12-21 09:12:48.436994802 -0300 @@ -21,7 +21,7 @@ [0x0000004f] = "PPIN", [0x00000060] = "LBR_CORE_TO", [0x00000079] = "IA32_UCODE_WRITE", - [0x0000008b] = "IA32_UCODE_REV", + [0x0000008b] = "AMD64_PATCH_LEVEL", [0x0000008C] = "IA32_SGXLEPUBKEYHASH0", [0x0000008D] = "IA32_SGXLEPUBKEYHASH1", [0x0000008E] = "IA32_SGXLEPUBKEYHASH2", @@ -286,6 +286,7 @@ [0xc0010114 - x86_AMD_V_KVM_MSRs_offset] = "VM_CR", [0xc0010115 - x86_AMD_V_KVM_MSRs_offset] = "VM_IGNNE", [0xc0010117 - x86_AMD_V_KVM_MSRs_offset] = "VM_HSAVE_PA", + [0xc001011e - x86_AMD_V_KVM_MSRs_offset] = "AMD64_VM_PAGE_FLUSH", [0xc001011f - x86_AMD_V_KVM_MSRs_offset] = "AMD64_VIRT_SPEC_CTRL", [0xc0010130 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV_ES_GHCB", [0xc0010131 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV", $ The new MSR has a pattern that wasn't matched to avoid a clash with IA32_UCODE_REV, change the regex to prefer the more relevant AMD_ prefixed ones to catch this new AMD64_VM_PAGE_FLUSH MSR. Which causes these parts of tools/perf/ to be rebuilt: CC /tmp/build/perf/trace/beauty/tracepoints/x86_msr.o LD /tmp/build/perf/trace/beauty/tracepoints/perf-in.o LD /tmp/build/perf/trace/beauty/perf-in.o LD /tmp/build/perf/perf-in.o LINK /tmp/build/perf/perf This addresses this perf tools build warning: diff -u tools/arch/x86/include/asm/msr-index.h arch/x86/include/asm/msr-index.h Warning: Kernel ABI header at 'tools/arch/x86/include/asm/msr-index.h' differs from latest version at 'arch/x86/include/asm/msr-index.h' Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Paolo Bonzini <[email protected]> Cc: Tom Lendacky <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24tools headers cpufeatures: Sync with the kernel sourcesArnaldo Carvalho de Melo1-0/+2
To pick the changes in: 69372cf01290b958 ("x86/cpu: Add VM page flush MSR availablility as a CPUID feature") e1b35da5e624f8b0 ("x86: Enumerate AVX512 FP16 CPUID feature flag") That causes only these 'perf bench' objects to rebuild: CC /tmp/build/perf/bench/mem-memcpy-x86-64-asm.o CC /tmp/build/perf/bench/mem-memset-x86-64-asm.o And addresses these perf build warnings: Warning: Kernel ABI header at 'tools/arch/x86/include/asm/cpufeatures.h' differs from latest version at 'arch/x86/include/asm/cpufeatures.h' diff -u tools/arch/x86/include/asm/cpufeatures.h arch/x86/include/asm/cpufeatures.h Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Kyung Min Park <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Paolo Bonzini <[email protected]> Cc: Tom Lendacky <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24tools headers UAPI: Update epoll_pwait2 affected filesArnaldo Carvalho de Melo2-1/+4
To pick the changes from: b0a0c2615f6f199a ("epoll: wire up syscall epoll_pwait2") That addresses these perf build warning: Warning: Kernel ABI header at 'tools/include/uapi/asm-generic/unistd.h' differs from latest version at 'include/uapi/asm-generic/unistd.h' diff -u tools/include/uapi/asm-generic/unistd.h include/uapi/asm-generic/unistd.h Warning: Kernel ABI header at 'tools/perf/arch/x86/entry/syscalls/syscall_64.tbl' differs from latest version at 'arch/x86/entry/syscalls/syscall_64.tbl' diff -u tools/perf/arch/x86/entry/syscalls/syscall_64.tbl arch/x86/entry/syscalls/syscall_64.tbl Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Willem de Bruijn <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2020-12-24scripts: coccicheck: Correct usage of make coccicheckSumera Priyadarsini1-0/+12
The command "make coccicheck C=1 CHECK=scripts/coccicheck" results in the error: ./scripts/coccicheck: line 65: -1: shift count out of range This happens because every time the C variable is specified, the shell arguments need to be "shifted" in order to take only the last argument, which is the C file to test. These shell arguments mostly comprise flags that have been set in the Makefile. However, when coccicheck is specified in the make command as a rule, the number of shell arguments is zero, thus passing the invalid value -1 to the shift command, resulting in an error. Modify coccicheck to print correct usage of make coccicheck so as to avoid the error. Signed-off-by: Sumera Priyadarsini <[email protected]> Signed-off-by: Julia Lawall <[email protected]>
2020-12-24coccinelle: update expiring email addressesJulia Lawall1-2/+2
Signed-off-by: Julia Lawall <[email protected]>
2020-12-24Merge tag 'amd-drm-fixes-5.11-2020-12-23' of ↵Dave Airlie32-111/+161
git://people.freedesktop.org/~agd5f/linux into drm-next amd-drm-fixes-5.11-2020-12-23: amdgpu: - Vangogh SMU fixes - Arcturus gfx9 fixes - Misc display fixes - Sienna Cichlid SMU update - Fix S3 display memory leak - Fix regression caused by DP sub-connector support amdkfd: - Properly require pcie atomics for gfx10 Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-24Merge tag 'drm-misc-next-fixes-2020-12-22' of ↵Dave Airlie6-21/+21
git://anongit.freedesktop.org/drm/drm-misc into drm-next Short summary of fixes pull: * dma-buf: Include <linux/vmalloc.h> for building on MIPS * komeda: Fix order of operation in commit tail; Fix NULL-pointer and out-of-bounds access; Cleanups * ttm: Fix an unused-function warning Signed-off-by: Dave Airlie <[email protected]> From: Thomas Zimmermann <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/X+JFYlW1SEZa6ShA@linux-uq9g
2020-12-23Merge tag 'sound-fix-5.11-rc1' of ↵Linus Torvalds10-22/+70
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound fixes from Takashi Iwai: "A collection of small fixes that came up recently for 5.11. The majority of fixes are usual HD-audio and USB-audio quirks, with a few PCM core fixes for addressing the information leak and yet more UBSAN fixes in the core side" * tag 'sound-fix-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA/hda: apply jack fixup for the Acer Veriton N4640G/N6640G/N2510G ALSA: hda/realtek: Apply jack fixup for Quanta NL3 ALSA: usb-audio: Add implicit feeback support for the BOSS GT-1 ALSA: usb-audio: Add alias entry for ASUS PRIME TRX40 PRO-S ALSA: core: Remove redundant comments ALSA: hda/realtek: Add quirk for MSI-GP73 ALSA: pcm: oss: Fix a few more UBSAN fixes ALSA: pcm: Clear the full allocated memory at hw_params ALSA: memalloc: Align buffer allocations in page size ALSA: usb-audio: Disable sample read check if firmware doesn't give back ALSA: pcm: Remove snd_pcm_lib_preallocate_dma_free() ALSA: usb-audio: Add VID to support native DSD reproduction on FiiO devices ALSA: core: memalloc: add page alignment for iram ALSA: hda/realtek - Supported Dell fixed type headset ALSA: hda/realtek: Remove dummy lineout on Acer TravelMate P648/P658
2020-12-23Merge tag 'tag-chrome-platform-for-v5.11' of ↵Linus Torvalds3-78/+427
git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux Pull chrome platform updates from Benson Leung: "cros_ec_typec: - A series from Prashant for Type-C to implement TYPEC_STATUS, parsing USB PD Partner ID VDOs, and registering partner altmodes. cros_ec misc: - Don't treat RTC events as wakeup sources in cros_ec_proto" * tag 'tag-chrome-platform-for-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux: platform/chrome: cros_ec_typec: Tolerate unrecognized mux flags platform/chrome: cros_ec_typec: Register partner altmodes platform/chrome: cros_ec_typec: Parse partner PD ID VDOs platform/chrome: cros_ec_typec: Introduce TYPEC_STATUS platform/chrome: cros_ec: Import Type C host commands platform/chrome: cros_ec_typec: Clear partner identity on device removal platform/chrome: cros_ec_typec: Fix remove partner logic platform/chrome: cros_ec_typec: Relocate set_port_params_v*() functions platform/chrome: Don't treat RTC events as wakeup sources
2020-12-23Merge tag 'linux-watchdog-5.11-rc1' of ↵Linus Torvalds17-370/+104
git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - Removal of the pnx83xx driver - Add a binding for A100's watchdog controller - Add Rockchip compatibles to snps,dw-wdt.yaml - hpwdt: Disable NMI in Crash Kernel - Fix potential dereferencing of null pointer in watchdog_core - Several other small fixes and improvements * tag 'linux-watchdog-5.11-rc1' of git://www.linux-watchdog.org/linux-watchdog: (23 commits) watchdog: convert comma to semicolon watchdog: iTCO_wdt: use dev_*() instead of pr_*() for logging dt-binding: watchdog: add Rockchip compatibles to snps,dw-wdt.yaml watchdog: coh901327: add COMMON_CLK dependency dt-bindings: watchdog: sun4i: Add A100 compatible watchdog: qcom: Avoid context switch in restart handler watchdog: iTCO_wdt: use module_platform_device() macro watchdog: Fix potential dereferencing of null pointer watchdog: wdat_wdt: Fix missing kerneldoc reported by W=1 watchdog/hpwdt: Reflect changes watchdog/hpwdt: Disable NMI in Crash Kernel wdt: sp805: add watchdog_stop on reboot watchdog: sbc_fitpc2_wdt: add __user annotations watchdog: geodewdt: remove unneeded break watchdog: rti-wdt: fix reference leak in rti_wdt_probe watchdog: qcom_wdt: set WDOG_HW_RUNNING bit when appropriate watchdog: remove pnx83xx driver watchdog: stm32_iwdg: don't print an error on probe deferral watchdog: sprd: change to use usleep_range() instead of busy loop watchdog: sprd: check busy bit before new loading rather than after that ...
2020-12-23drm/i915/gem: Optimistically prune dma-resv from the shrinker.Chris Wilson5-5/+37
As we shrink an object, also see if we can prune the dma-resv of idle fences it is maintaining a reference to. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-23drm/i915/gt: Prefer recycling an idle fenceChris Wilson1-2/+20
If we want to reuse a fence that is in active use by the GPU, we have to wait an uncertain amount of time, but if we reuse an inactive fence, we can change it right away. Loop through the list of available fences twice, ignoring any active fences on the first pass. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-23drm/i915/gt: Consolidate the CS timestamp clocksChris Wilson17-256/+205
Pull the GT clock information [used to derive CS timestamps and PM interval] under the GT so that is it local to the users. In doing so, we consolidate the two references for the same information, of which the runtime-info took note of a potential clock source override and scaling factors. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-23drm/i915/selftests: Confirm CS_TIMESTAMP / CTX_TIMESTAMP share a clockChris Wilson1-1/+202
We assume that both timestamps are driven off the same clock [reported to userspace as I915_PARAM_CS_TIMESTAMP_FREQUENCY]. Verify that this is so by reading the timestamp registers around a busywait (on an otherwise idle engine so there should be no preemptions). v2: Icelake (not ehl, nor tgl) seems to be using a fixed 80ns interval for, and only for, CTX_TIMESTAMP -- or it may be GPU frequency and the test is always running at maximum frequency?. As far as I can tell, this isolated change in behaviour is undocumented. Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-23drm/i915/selftests: Remove redundant live_context for evictionChris Wilson1-13/+5
We just need the context image from the logical state to force eviction of many contexts, so simplify by avoiding the GEM context container. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-12-23drm/amdgpu: drop psp ih programming for sriov guest on naviHawking Zhang1-16/+2
the psp access ih path is not needed in navi Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Jane Jian <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/display: Use common error handling code in dc_create()Markus Elfring1-9/+6
Adjust a jump target so that a bit of exception handling can be better reused at the end of this function. Signed-off-by: Markus Elfring <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/display: Return directly after a failed kzalloc() in dc_create()Markus Elfring1-4/+2
* Return directly after a call of the function “kzalloc” failed at the beginning. * Delete a label which became unnecessary with this refactoring. Signed-off-by: Markus Elfring <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdkfd: check both client id and src id in interrupt handlersAlex Deucher1-11/+35
We can have the same src ids for different client ids so make sure to check both the client id and the source id when handling interrupts. Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: fix handling of irq domains on soc15 and newer GPUsAlex Deucher1-1/+2
We need to take into account the client id otherwise we'll end up sending generic events for any src id that is registered. We only support irq domains on pre-soc15 parts so client is always legacy. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: de-initialize software ih ringHawking Zhang3-0/+3
tear down software ih ring and its state. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: set ih soft ring enabled flag for vega and naviHawking Zhang2-0/+6
software ih ring is enabled in vega10 and navi ih block by default. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: enable software ih ring for vega20 ih blockHawking Zhang1-0/+7
software ih ring will be used as a workaround in case hardware ih ring 1 and ring 2 don't work Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/pm: support overdrive vddgfx offset setting(V2)Evan Quan4-2/+70
This is supported by Sienna Cichlid, Navy Flounder and Dimgrey Cavefish. For these ASICs, the target voltage calculation can be illustrated by "voltage = voltage calculated from v/f curve + overdrive vddgfx offset". V2: limit the smu_version check for Sienna Cichlid only Here are some sample usages about this new OD setting: 1. Check current vddgfx offset setting by cat /sys/class/drm/card0/device/pp_od_clk_voltage ... ... OD_VDDGFX_OFFSET: 0mV ... ... 2. Set new vddgfx offset by echo "vo 10" > /sys/class/drm/card0/device/pp_od_clk_voltage cat /sys/class/drm/card0/device/pp_od_clk_voltage ... ... OD_VDDGFX_OFFSET: 10mV ... ... 3. Commit the new setting by echo "c" > /sys/class/drm/card0/device/pp_od_clk_voltage Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/pm: enable Sienna Cichlid overdrive supportEvan Quan2-1/+243
Enable Sienna Cichlid gfxclk/uclk overdrive support. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/pm: populate Sienna Cichlid default overdrive table settingsEvan Quan1-0/+38
Populate the bootup overdrive table settings. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/pm: Add interface for request WGPsJinzhou Su3-3/+41
When user specifies a reduced WGP(CU) config via disalbe_cu module parameter, this does not disable the clocks which uses additional power. This interface send active WGP number to SMU and SMU will cooperate with RLC to power off relative WGPs. v2: Add request active WGPs in Vangogh smu post init. Signed-off-by: Jinzhou.Su <[email protected]> Reviewed-by: Jiansong Chen <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amd/pm: add pptable_funcs documentation (v3)Ryan Taylor1-0/+526
Documents the hooks in struct pptable_funcs. v2: Improved documentation accuracy. v3: Improved set_default_od_settings() definition. Signed-off-by: Ryan Taylor <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: don't create ih ring 1 and ring 2 for APUHawking Zhang1-11/+12
APUs don't support ih ring 1 and ring 2. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: drop ih reroute function from psp v11Hawking Zhang1-36/+0
For all the ASICs that integrate psp v11, vega20 doesn't support ih reroute. arcturus and later will allow kernel driver to program ih_cfg_index/data through mmio directly. navi1x and onwards will only support grb_ih_set command in sriov configuration. psp_v11_0_reroute_ih is not needed any more. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: drop IH_CHICKEN programming from vega10 ih blockHawking Zhang1-3/+1
except for RENOIR, it is not correct to have IH_CHICKEN programming in vega10 ih block. Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Dennis Li <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-12-23drm/amdgpu: correct ih_chicken programming for vega10/vega20 ih blocksHawking Zhang2-6/+0
IH_CHICKEN.MC_SPACE_FBPA_ENABLE field is only valid when IH_RB_CNTL.MC_SPACE is programed to 0x3, frame buffer physical address. For both bus address and gpu virtual address, don't program MC_SPACE_FBPA_ENABLE field Signed-off-by: Hawking Zhang <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Felix Kuehling <[email protected]> Reviewed-by: Dennis Li <[email protected]> Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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