diff options
| author | Hawking Zhang <[email protected]> | 2020-12-01 00:04:36 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2020-12-23 15:06:01 -0500 |
| commit | 05bd7e74ec3e572eb129019d7b606febd27daa77 (patch) | |
| tree | 87da12d1e5bd25c9a4e0c33f205b0f7a6d16f10a | |
| parent | 580a6d2facdf4da242a8a4f39fd61db9664c508f (diff) | |
drm/amdgpu: correct ih_chicken programming for vega10/vega20 ih blocks
IH_CHICKEN.MC_SPACE_FBPA_ENABLE field is only
valid when IH_RB_CNTL.MC_SPACE is programed to 0x3,
frame buffer physical address. For both bus address
and gpu virtual address, don't program MC_SPACE_FBPA_ENABLE
field
Signed-off-by: Hawking Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
Acked-by: Felix Kuehling <[email protected]>
Reviewed-by: Dennis Li <[email protected]>
Reviewed-by: Feifei Xu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 3 |
2 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c index 6694df71f545..17c0a07c883b 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c @@ -281,9 +281,6 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev) if (adev->irq.ih.use_bus_addr) { ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN, MC_SPACE_GPA_ENABLE, 1); - } else { - ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN, - MC_SPACE_FBPA_ENABLE, 1); } WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); } diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c index 913b76396ba3..e381a255cc60 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c @@ -312,9 +312,6 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev) if (adev->irq.ih.use_bus_addr) { ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN, MC_SPACE_GPA_ENABLE, 1); - } else { - ih_chicken = REG_SET_FIELD(ih_chicken, IH_CHICKEN, - MC_SPACE_FBPA_ENABLE, 1); } WREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN, ih_chicken); } |