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2021-04-01Merge tag 'stm32-dt-for-v5.13-1' of ↵Arnd Bergmann29-326/+1551
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v5.13, round 1 Highlights: ---------- MCU part: -Add stm32h750 SoC support. It is based on stm32h743 and embeds crypto IPs and 2 ADC. -Add new art-pi board based on stm32h750. This board embeds: -8MB QSPI flash. -16MB SPI flash. -32MB SDRAM. -AP6212 combo (wifi/bt/fm). MPU part: -Use dedicated PTP clock for Ethernet controller on stm32mp151. -Enable i2c analog filter on stm32mp151. -DH: -Update GPIO names. -Enable crc1 & crryp1 on DHSOM. -Engicam: add new boards support: -MicroGEA SOM which embeds STM32MP157aac, 512 MB Nand Flash I2S. -MicroGEA STM32MP1 Microdev 2.0 which embeds MicroGEA SOM, Ethernet up to 100 Mbps, USB typeA, microSD, UMTS LTE, Wifi/BT LVDS panel connector. -MicroGEA STM32MP1 MicroDev 2.0 7" which embeds a MicroGEA STM32MP1 MicroDev 2.0 plus 7" Open Frame panel solution (7" AUO B101AW03 LVDS panel and EDT DT5526 Touch) -i.Core STM32MP1 EDIMM SoM based on STM32MP157A. -C.TOUCH 2.0 n EDIMM compliant general purpose Carrier board with capacitive touch interface support based on i.Core STM32MP1 EDIMM SoM. It embeds ETH 10/100, wifi/bt, CAN, USB TypeA/OTG, LVDS pannel connector. -EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board based on i.Core STM32MP1 EDIMM SoM. IT embeds LCD 7" C.Touch, wifi/bt,2*LVDS FHD, 3*USB2, 1*USB3 ... * tag 'stm32-dt-for-v5.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (26 commits) ARM: dts: stm32: Add PTP clock to Ethernet controller ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM ARM: dts: stm32: Update GPIO line names on PicoITX ARM: dts: stm32: Update GPIO line names on DRC02 ARM: dts: stm32: Fill GPIO line names on AV96 ARM: dts: stm32: Fill GPIO line names on DHCOM SoM dt-bindings: serial: stm32: Use 'type: object' instead of false for 'additionalProperties' ARM: stm32: Add a new SoC - STM32H750 ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 ARM: dts: stm32: fix i2c node typo in stm32h743 ARM: dts: stm32: add new instances for stm32h743 MCU ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dt-bindings: arm: stm32: Add compatible strings for ART-PI board Documentation: arm: stm32: Add stm32h750 value line doc ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151 ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM dt-bindings: arm: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'ux500-dts-v5.13' of ↵Arnd Bergmann8-285/+419
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Ux500 DTS changes for the v5.13 kernel cycle: - Fix up the WLAN on Janice - Fix the touchscreen on TVK R2 - Push down definitions to the UIBs instead of trying to share too much. - Bump the AUX1 voltage on the AB8500 so the touchscreen will work. - Define the CTTYSP touchscreen on the TVK R3. * tag 'ux500-dts-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ux500: Add Cypress CTTYSP touch to TVK UIB ARM: dts: ux500: Bump AUX1 voltage ARM: dts: ux500: Clarify UIB version per board ARM: dts: ux500: Totally separate TVK R2 and R3 ARM: dts: ux500: Push TC35893 defines to each UIB ARM: dts: ux500: Fix up TVK R3 sensors ARM: dts: ux500: Push sensors to TVK R2 board ARM: dts: ux500: Move Synaptics to right include ARM: dts: ux500: Fix touchscreen on TVK R2 ARM: dts: ux500: Fix BT+WLAN on Janice Link: https://lore.kernel.org/r/CACRpkdanRQ6A85d=7vgpzbg-m3-yFcpQ4fuzrxZu3RJ0DrA2bQ@mail.gmail.com Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'juno-updates-5.13' of ↵Arnd Bergmann3-1/+12
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt ARMv8 Juno updates for v5.13 Couple of changes to describe PCI dma-ranges correctly which was previously removed and to enable the PCIe and DMA SMMU. * tag 'juno-updates-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Enable more SMMUs arm64: dts: juno: Describe PCI dma-ranges Link: https://lore.kernel.org/r/20210331100410.cenuhvpqoumvsk52@bogus Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'imx-dt64-5.13' of ↵Arnd Bergmann41-524/+3102
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree update for 5.13: - A series from Dong Aisheng to update i.MX8Q device trees for adopting SS (SubSystems) based bindings. - New board support: Kontron pitx-imx8m, Engicam i.Core MX8M Mini. - A series from Adrien Grassein to add various peripheral support for imx8mm-nitrogen-r2 board. - A series from Guido Günther to update librem5-devkit device tree. - A number of patches from Michael Walle to add Root Complex Event Collector interrupt, update MTD partitions and add rtc0 alias for ls1028a-kontron-sl28 board. - Add EQOS MAC support for phyBOARD-Pollux-i.MX8MP. - Add 2x2 SFP+ cage support for clearfog-itx boards. - Small and random update for various boards. * tag 'imx-dt64-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (55 commits) arm64: dts: fsl-ls1028a-kontron-sl28: add rtc0 alias arm64: dts: ls1028a: move rtc alias to individual boards arm64: dts: fsl-ls1028a-kontron-sl28: combine unused partitions arm64: dts: fsl-ls1028a-kontron-sl28: move MTD partitions arm64: dts: imx8mp-evk: Improve the Ethernet PHY description arm64: dts: imx8mq-librem5-r3: Mark buck3 as always on arm64: dts: imx8mq-librem5: Hog the correct gpio arm64: dts: lx2160a-clearfog-itx: add SFP support arm64: dts: imx8mp-phyboard-pollux-rdk: Change debug UART arm64: dts: imx8mn: Reorder flexspi clock-names entry arm64: dts: imx8mm: Reorder flexspi clock-names entry arm64: dts: ls1028a: set up the real link speed for ENETC port 2 arm64: dts: imx8mm-nitrogen-r2: add ecspi2 support arm64: dts: imx: add imx8qm mek support arm64: dts: imx: add imx8qm common dts file arm64: dts: imx8qm: add dma ss support arm64: dts: imx8: split adma ss into dma and audio ss arm64: dts: imx8qm: add conn ss support arm64: dts: imx8qm: add lsio ss support arm64: dts: imx8: switch to new lpcg clock binding ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'imx-dt-5.13' of ↵Arnd Bergmann32-70/+270
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX device tree change for 5.13: - New board support: i.MX7D based reMarkable2. - Clean up imx6ql-pfla02 hog group by moving pins into corresponded client groups. - Add Netronix embedded controller for imx50-kobo-aura. - A series from Sebastian Reichel to improve GE Bx50v3 device trees. - Support I2C bus recovery for imx6qdl-wandboard by adding SCL/SDA GPIOs. - Remove unnecessary #address-cells/#size-cells from imx6qdl-gw boards. - Various small and random device tree update. * tag 'imx-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (21 commits) ARM: dts: imx6: pbab01: Set USB OTG port to peripheral ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing ARM: imx7d-remarkable2: Initial device tree for reMarkable2 ARM: dts: imx7d-mba7: Remove unsupported PCI properties ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings ARM: dts: imx: bx50v3: Define GPIO line names ARM: dts: imx: bx50v3: i2c GPIOs are open drain ARM: dts: imx6q-ba16: improve PHY information ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO ARM: dts: ls1021a: mark crypto engine dma coherent ARM: dts: colibri-imx6ull: Change drive strength for usdhc2 ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes name ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53 ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controller ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'imx-bindgins-5.13' of ↵Arnd Bergmann4-4/+25
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX bindings update for 5.13: - Add vendor prefix for reMarkable. - Add compatible for reMarkable 2 e-Ink tablet, Kontron pITX-imx8m board, Engicam i.Core MX8M Mini devices. - Add compatbile 'fsl,imx8qm-mu' for i.MX mailbox bindings. - One correction on example clock-names in imx8qxp-lpcg bindings. * tag 'imx-bindgins-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: Add the reMarkable 2 e-Ink tablet dt-bindings: Add vendor prefix for reMarkable dt-bindings: mailbox: mu: add imx8qm support dt-bindings: arm: fsl: add imx8qm boards compatible string dt-bindings: arm: fsl: add Kontron pITX-imx8m board dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit dt-bindings: arm: fsl: Add Engicam i.Core MX8M Mini C.TOUCH 2.0 dt-bindings: clock: imx8qxp-lpcg: correct the example clock-names Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'arm-soc/for-5.13/devicetre-arm64' of ↵Arnd Bergmann6-7/+375
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.13, please pull the following: - Rafal continues to add support for the 4908 SoCs and describes the USB PHY, firmware flash partitions and Ethernet switch and Ethernet controller. He also adds support for the TP-Link Archer C2300 V1 router and upates the Netgear R8000P and Asus GT-AC5300 routers network ports description. * tag 'arm-soc/for-5.13/devicetre-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcm4908: add Ethernet MAC addr arm64: dts: broadcom: bcm4908: add Ethernet TX irq arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY mode arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1 dt-bindings: arm: bcm: document TP-Link Archer C2300 binding arm64: dts: broadcom: bcm4908: fix switch parent node name arm64: dts: broadcom: bcm4908: describe firmware partitions arm64: dts: broadcom: bcm4908: add remaining Netgear R8000P LEDs arm64: dts: broadcom: bcm4908: describe Netgear R8000P switch arm64: dts: broadcom: bcm4908: describe Ethernet controller arm64: dts: broadcom: bcm4908: describe USB PHY Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'arm-soc/for-5.13/devicetree' of ↵Arnd Bergmann25-55/+94
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.13, please pull the following: - Rafal fixes YAML warnings for the memory nodes of BCM5301X nodes and adds support for the NVMEM NVRAM node on Linksys and Luxul WLAN routers. He also fixes up the partitions for the Linksys EA9400 to use the newly introduced parser compatible and sets the power LED to its default state. * tag 'arm-soc/for-5.13/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: Set Linksys EA9500 power LED ARM: dts: BCM5301X: Fix Linksys EA9500 partitions ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers ARM: dts: BCM5301X: fix "reg" formatting in /memory node Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'socfpga_dts_update_for_v5.13' of ↵Arnd Bergmann4-126/+140
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt SoCFPGA DTS updates for v5.13 - Patches from Krzysztof Kozlowski that fixes dtc warnings and dtbs_check warnings - Adjust the "cnds,read-delay" value for the Agilex devkit to 2 * tag 'socfpga_dts_update_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: intel: adjust qpsi read-delay property arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema arm64: dts: intel: socfpga_agilex: align node names with dtschema arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts arm64: dts: intel: socfpga_agilex: move usbphy out of soc node arm64: dts: intel: socfpga_agilex: remove default status=okay arm64: dts: intel: socfpga_agilex: move timer out of soc node arm64: dts: intel: socfpga_agilex: move clocks out of soc node arm64: dts: intel: socfpga: override clocks by label Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01Merge tag 'omap-for-v5.13/dts-genpd-signed' of ↵Arnd Bergmann17-304/+727
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Devicetree changes for omaps for genpd support for v5.13 In order to move omap4/5 and dra7 to probe with devicetree data and genpd, we need to add the missing interconnect target module configuration for the drivers that do not still have it. This is similar to what we have already done earlier for am3 and 4 earlier. These patches are very much similar for all the three SoCs here. The dra7 changes were already available for v5.12 merge window, but were considered too late to add for v5.12. The patches for omap4 and 5 follow the same pattern, except for PCIe that is available only on dra7. We do the changes one driver at a time, and still keep the legacy property for "ti,hwmods" mostly around, except for cases when already not needed. We will be dropping the custom property and related legacy data in a follow-up series. * tag 'omap-for-v5.13/dts-genpd-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (53 commits) ARM: dts: Configure simple-pm-bus for omap5 l3 ARM: dts: Configure simple-pm-bus for omap5 l4_cfg ARM: dts: Configure simple-pm-bus for omap5 l4_per ARM: dts: Configure simple-pm-bus for omap5 l4_wkup ARM: dts: Move omap5 l3-noc to a separate node ARM: dts: Move omap5 mmio-sram out of l3 interconnect ARM: dts: Configure interconnect target module for omap5 sata ARM: dts: Configure interconnect target module for omap5 gpmc ARM: dts: Configure interconnect target module for omap5 mpu ARM: dts: Configure interconnect target module for omap5 emif ARM: dts: Configure interconnect target module for omap5 dmm ARM: dts: Prepare for simple-pm-bus for omap4 l3 ARM: dts: Configure simple-pm-bus for omap4 l4_cfg ARM: dts: Configure simple-pm-bus for omap4 l4_per ARM: dts: Configure simple-pm-bus for omap4 l4_wkup ARM: dts: Move omap4 l3-noc to a separate node ARM: dts: Move omap4 mmio-sram out of l3 interconnect ARM: dts: Configure interconnect target module for omap4 mpu ARM: dts: Configure interconnect target module for omap4 debugss ARM: dts: Configure interconnect target module for omap4 emif ... Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01ARM: mstar: Add mpll to base dtsiDaniel Palmer1-0/+8
All of the currently known MStar/SigmaStar ARMv7 SoCs have at least one MPLL and it seems to always be at the same place so add it to the base dtsi. Signed-off-by: Daniel Palmer <[email protected]> Link: https://lore.kernel.org/r/[email protected]' Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01ARM: mstar: Add the external clocks to the base dstiDaniel Palmer1-0/+15
All of the currently known MStar/SigmaStar ARMv7 SoCs have an "xtal" clock input that is usually 24MHz and an "RTC xtal" that is usually 32KHz. The xtal input has to be connected to something so it's enabled by default. The MSC313 and MSC313E do not bring the RTC clock input out to the pins so it's impossible to connect it. The SSC8336 does bring the input out to the pins but it's not always actually connected to something. The RTC node needs to always be present because in the future the nodes for the clock muxes will refer to it even if it's not usable. The RTC node is disabled by default and should be enabled at the board level if the RTC input is wired up. Signed-off-by: Daniel Palmer <[email protected]> Link: https://lore.kernel.org/r/[email protected]' Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01ARM: mstar: Select MSTAR_MSC313_MPLLDaniel Palmer1-0/+1
All of the ARCH_MSTARV7 chips have an MPLL as the source for peripheral clocks so select MSTAR_MSC313_MPLL. Signed-off-by: Daniel Palmer <[email protected]> Link: https://lore.kernel.org/r/[email protected]' Signed-off-by: Arnd Bergmann <[email protected]>
2021-04-01ARM: dts: stm32: Add PTP clock to Ethernet controllerKurt Kanzenbach1-0/+2
Add the PTP clock to the Ethernet controller. Otherwise, the driver uses the main clock to derive the PTP frequency which is not necessarily the correct one. Tested with linuxptp on Olimex STMP1-OLinuXino-LIME2. Signed-off-by: Kurt Kanzenbach <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOMMarek Vasut5-0/+20
Enable the CRC accelerator on all STM32MP15xx DHSOM based systems and CRYP accelerator on all STM32MP15x[CF] DHSOM based systems. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: Update GPIO line names on PicoITXMarek Vasut1-6/+6
Use more specific custom GPIO line names which denote exactly where the GPIO came from, i.e. the base board. Also, update the new blank GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their original values. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: Update GPIO line names on DRC02Marek Vasut1-6/+6
Use more specific custom GPIO line names which denote exactly where the GPIO came from, i.e. the base board. Also, update the new blank GPIO line names set up by stm32mp15xx-dhcom-som.dtsi back to their original values. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: Fill GPIO line names on AV96Marek Vasut1-0/+35
Fill in the custom GPIO line names used by DH. Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: Fill GPIO line names on DHCOM SoMMarek Vasut1-0/+60
Fill in the custom GPIO line names used by DH on the DHCOM SoM. The GPIO line names are in accordance to DHCOM Design Guide R04 available at [1], section 3.9 GPIO. [1] https://wiki.dh-electronics.com/images/5/52/DOC_DHCOM-Design-Guide_R04_2018-06-28.pdf Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01dt-bindings: serial: stm32: Use 'type: object' instead of false for ↵dillon min1-1/+2
'additionalProperties' To use additional properties 'bluetooth' on serial, need replace false with 'type: object' for 'additionalProperties' to make it as a node, else will run into dtbs_check warnings. 'arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: serial@40004800: 'bluetooth' does not match any of the regexes: 'pinctrl-[0-9]+' Fixes: af1c2d81695b ("dt-bindings: serial: Convert STM32 UART to json-schema") Reported-by: kernel test robot <[email protected]> Tested-by: Valentin Caron <[email protected]> Signed-off-by: dillon min <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: dillon min <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: stm32: Add a new SoC - STM32H750dillon min1-0/+1
The STM32H750 is a Cortex-M7 MCU running at 480MHz and containing 128KBytes internal flash, 1MiB SRAM. Signed-off-by: dillon min <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6dillon min4-0/+325
This patchset has following changes: - introduce stm32h750.dtsi to support stm32h750 value line - add pin groups for usart3/uart4/spi1/sdmmc2 - add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile) - add stm32h750-art-pi.dts to support art-pi board art-pi board component: - 8MiB qspi flash - 16MiB spi flash - 32MiB sdram - ap6212 wifi&bt&fm the detail board information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: fix i2c node typo in stm32h743Alexandre Torgue1-2/+2
Replace upper case by lower case in i2c nodes name. Signed-off-by: dillon min <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: add new instances for stm32h743 MCUAlexandre Torgue1-0/+31
Some instances are missing in current support of stm32h743 MCU. This commit adds usart3/uart4 and sdmmc2 support. Signed-off-by: dillon min <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750dillon min5-308/+330
This patch is intend to add support stm32h750 value line, just add stm32h7-pinctrl.dtsi for extending, with following changes: - rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi - move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi, to fix make dtbs_check warrnings arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: 'i2c@40005C00', 'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' Signed-off-by: dillon min <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01dt-bindings: arm: stm32: Add compatible strings for ART-PI boarddillon min1-0/+4
Art-pi based on stm32h750xbh6, with following resources: -8MiB QSPI flash -16MiB SPI flash -32MiB SDRAM -AP6212 wifi, bt, fm detail information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-04-01Documentation: arm: stm32: Add stm32h750 value line docdillon min2-0/+35
This patchset add support for soc stm32h750, stm32h750 has mirror different from stm32h743 item stm32h743 stm32h750 flash size: 2MiB 128KiB adc: none 3 crypto-hash: none aes/hamc/des/tdes/md5/sha detail information can be found at: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html Signed-off-by: dillon min <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-03-30arm64: dts: intel: adjust qpsi read-delay propertyDinh Nguyen1-1/+1
The "cnds,read-delay" value needs to be 2 for the Agilex devkit. Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschemaKrzysztof Kozlowski1-3/+3
Align the LED node names with dtschema to silence dtbs_check warnings like: leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga_agilex: align node names with dtschemaKrzysztof Kozlowski1-4/+4
Align the NAND, GIC and UART node names with dtschema to silence dtbs_check warnings like: arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml: intc@fffc1000: $nodename:0: 'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml: serial0@ffc02000: $nodename:0: 'serial0@ffc02000' does not match '^serial(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga_agilex: use defined for GIC interruptsKrzysztof Kozlowski1-55/+82
Use human-readable defines for GIC interrupt type and flag, instead of hard-coding the numbers. It makes review easier. No functional change. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga_agilex: move usbphy out of soc nodeKrzysztof Kozlowski1-5/+5
The usual usb-nop-xceiv USB phy node should be under root node, to fix dtc warning: arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:472.21-476.5: Warning (simple_bus_reg): /soc/usbphy@0: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga_agilex: remove default status=okayKrzysztof Kozlowski1-1/+0
New nodes are okay by default. Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga_agilex: move timer out of soc nodeKrzysztof Kozlowski1-9/+9
The ARM architected timer is part of ARM CPU design therefore by convention it should not be inside the soc node. This also fixes dtc warning like: arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:410.9-416.5: Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga_agilex: move clocks out of soc nodeKrzysztof Kozlowski1-28/+28
The clocks are usually not part of the SoC but provided on the board (external oscillators). Moving them out of soc node fixes dtc warning: arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:111.10-137.5: Warning (simple_bus_reg): /soc/clocks: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30arm64: dts: intel: socfpga: override clocks by labelKrzysztof Kozlowski3-24/+12
Using full paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Dinh Nguyen <[email protected]>
2021-03-30ARM: dts: ux500: Add Cypress CTTYSP touch to TVK UIBLinus Walleij1-0/+46
The TVK1281618 R3 UIB has a Cypress CTTYSP touchscreen. Add it to the device tree file. Signed-off-by: Linus Walleij <[email protected]>
2021-03-30ARM: dts: ux500: Bump AUX1 voltageLinus Walleij1-2/+2
The voltage default on the AB8500 VAUX1 regulator is way too low and does not correspond to the setting in the vendor tree. This should be 2.8-3.3 V not 2.5-2.9 V or things like the HREFP520 touchscreen will not work. Signed-off-by: Linus Walleij <[email protected]>
2021-03-30ARM: dts: imx6: pbab01: Set USB OTG port to peripheralStefan Riedmueller1-0/+1
Due to a hardware bug preventing the correct detection if the ID pin the USB OTG port cannot be used in otg mode. It can either be set to host or peripheral. Set it to peripheral so vbus is disabled by default. Signed-off-by: Stefan Riedmueller <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-30ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxingStefan Riedmueller1-4/+4
The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to be muxed as GPIO. While at it, move the pinctrl to the vbus regulator since it is actually the regulator enable pin. Signed-off-by: Stefan Riedmueller <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-29arm64: dts: broadcom: bcm4908: add Ethernet MAC addrRafał Miłecki2-0/+28
On most BCM4908 devices MAC address can be read from the bootloader binary section containing device settings. Use NVMEM to describe that. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2021-03-29ARM: dts: BCM5301X: Set Linksys EA9500 power LEDRafał Miłecki1-0/+1
Set Linux default trigger to default on, just like it's normally done for power LEDs. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2021-03-29ARM: dts: BCM5301X: Fix Linksys EA9500 partitionsRafał Miłecki1-9/+7
Partitions are basically fixed indeed but firmware ones don't have hardcoded function ("firmware" vs "failsafe"). Actual function depends on bootloader configuration. Use a proper binding for that. While at it fix numbers formatting to avoid: arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2021-03-29ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151Alain Volmat1-0/+6
Enable the analog filter for all I2C nodes of the stm32mp151. Signed-off-by: Alain Volmat <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-03-29arm64: dts: fsl-ls1028a-kontron-sl28: add rtc0 aliasMichael Walle1-1/+2
For completeness, add the rtc0 alias. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-29arm64: dts: ls1028a: move rtc alias to individual boardsMichael Walle4-4/+3
The aliases are board-specific and shouldn't be included in the common SoC dtsi. Move them over to the boards. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-29arm64: dts: fsl-ls1028a-kontron-sl28: combine unused partitionsMichael Walle1-19/+1
The failsafe partitions for the DP firmware and for AT-F are unused. If AT-F will ever be supported in the failsafe mode, then it will be a FIT image. Thus fold the unused partitions into the failsafe bootloader one to have enough storage if the bootloader image will grow. While at it, remove the reserved partition. It served no purpose other than having no hole in the map. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-29arm64: dts: fsl-ls1028a-kontron-sl28: move MTD partitionsMichael Walle1-45/+49
Move the MTD partitions to the partitions subnode. This is the new way to specify the partitions, see Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-29arm64: dts: imx8mp-evk: Improve the Ethernet PHY descriptionFabio Estevam1-0/+2
According to the datasheet RTL8211, it must be asserted low for at least 10ms and at least 72ms "for internal circuits settling time" before accessing the PHY registers. Add properties to describe such requirements. Reported-by: Joakim Zhang <[email protected]> Signed-off-by: Fabio Estevam <[email protected]> Tested-by: Joakim Zhang <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-03-29arm64: dts: imx8mq-librem5-r3: Mark buck3 as always onSebastian Krzyszkowiak1-0/+4
Commit 99e71c029213 ("arm64: dts: imx8mq-librem5: Don't mark buck3 as always on") removed always-on marking from GPU regulator, which is great for power saving - however it introduces additional i2c0 traffic which can be deadly for devices from the Dogwood batch. To workaround the i2c0 shutdown issue on Dogwood, this commit marks buck3 as always-on again - but only for Dogwood (r3). Signed-off-by: Sebastian Krzyszkowiak <[email protected]> Signed-off-by: Martin Kepplinger <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
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