diff options
Diffstat (limited to 'drivers/net/ethernet/hisilicon')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 | ||||
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3_enet.c | 4 | ||||
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 9 | 
3 files changed, 11 insertions, 3 deletions
| diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 66d7a8b80e76..38b430f11fc1 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -194,6 +194,7 @@ struct hnae3_ae_dev {  	const struct hnae3_ae_ops *ops;  	struct list_head node;  	u32 flag; +	u8 override_pci_need_reset; /* fix to stop multiple reset happening */  	enum hnae3_dev_type dev_type;  	enum hnae3_reset_type reset_type;  	void *priv; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 0d1ae15a5927..1c1f17ec6be2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -1850,7 +1850,9 @@ static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)  	/* request the reset */  	if (ae_dev->ops->reset_event) { -		ae_dev->ops->reset_event(pdev, NULL); +		if (!ae_dev->override_pci_need_reset) +			ae_dev->ops->reset_event(pdev, NULL); +  		return PCI_ERS_RESULT_RECOVERED;  	} diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c index 1feceff1477c..1f52d11f77b5 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c @@ -1317,8 +1317,10 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev)  		hclge_handle_all_ras_errors(hdev);  	} else {  		if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) || -		    hdev->pdev->revision < 0x21) +		    hdev->pdev->revision < 0x21) { +			ae_dev->override_pci_need_reset = 1;  			return PCI_ERS_RESULT_RECOVERED; +		}  	}  	if (status & HCLGE_RAS_REG_ROCEE_ERR_MASK) { @@ -1327,8 +1329,11 @@ pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev)  	}  	if (status & HCLGE_RAS_REG_NFE_MASK || -	    status & HCLGE_RAS_REG_ROCEE_ERR_MASK) +	    status & HCLGE_RAS_REG_ROCEE_ERR_MASK) { +		ae_dev->override_pci_need_reset = 0;  		return PCI_ERS_RESULT_NEED_RESET; +	} +	ae_dev->override_pci_need_reset = 1;  	return PCI_ERS_RESULT_RECOVERED;  } |