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path: root/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
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Diffstat (limited to 'drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c')
-rw-r--r--drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c50
1 files changed, 34 insertions, 16 deletions
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 6dc7fa918799..1843bcd81402 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -430,11 +430,22 @@ static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu,
return ERR_PTR(-ENOMEM);
qsmmu->smmu.impl = impl;
- qsmmu->cfg = qcom_smmu_impl_data(smmu);
+ qsmmu->cfg = data->cfg;
return &qsmmu->smmu;
}
+/* Implementation Defined Register Space 0 register offsets */
+static const u32 qcom_smmu_impl0_reg_offset[] = {
+ [QCOM_SMMU_TBU_PWR_STATUS] = 0x2204,
+ [QCOM_SMMU_STATS_SYNC_INV_TBU_ACK] = 0x25dc,
+ [QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR] = 0x2670,
+};
+
+static const struct qcom_smmu_config qcom_smmu_impl0_cfg = {
+ .reg_offset = qcom_smmu_impl0_reg_offset,
+};
+
/*
* It is not yet possible to use MDP SMMU with the bypass quirk on the msm8996,
* there are not enough context banks.
@@ -455,28 +466,35 @@ static const struct qcom_smmu_match_data sdm845_smmu_500_data = {
* No need for adreno impl here. On sdm845 the Adreno SMMU is handled
* by the separate sdm845-smmu-v2 device.
*/
+ /* Also no debug configuration. */
+};
+
+static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
+ .impl = &qcom_smmu_impl,
+ .adreno_impl = &qcom_adreno_smmu_impl,
+ .cfg = &qcom_smmu_impl0_cfg,
};
static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
{ .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
{ .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_data },
- { .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,qdu1000-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_data },
+ { .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,qdu1000-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_500_impl0_data },
{ .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_data },
{ .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_data },
{ .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data },
- { .compatible = "qcom,sm6115-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sm6375-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sm8150-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sm8250-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sm8350-smmu-500", .data = &qcom_smmu_data },
- { .compatible = "qcom,sm8450-smmu-500", .data = &qcom_smmu_data },
+ { .compatible = "qcom,sm6115-smmu-500", .data = &qcom_smmu_500_impl0_data},
+ { .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sm6375-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sm8150-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sm8250-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sm8350-smmu-500", .data = &qcom_smmu_500_impl0_data },
+ { .compatible = "qcom,sm8450-smmu-500", .data = &qcom_smmu_500_impl0_data },
{ }
};
@@ -497,7 +515,7 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
if (np == NULL) {
/* Match platform for ACPI boot */
if (acpi_match_platform_list(qcom_acpi_platlist) >= 0)
- return qcom_smmu_create(smmu, &qcom_smmu_data);
+ return qcom_smmu_create(smmu, &qcom_smmu_500_impl0_data);
}
#endif