diff options
Diffstat (limited to 'drivers/gpu/drm/pl111')
| -rw-r--r-- | drivers/gpu/drm/pl111/Makefile | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_display.c | 56 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_drm.h | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_drv.c | 93 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_nomadik.c | 36 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_nomadik.h | 18 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_versatile.c | 56 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_vexpress.c | 134 | ||||
| -rw-r--r-- | drivers/gpu/drm/pl111/pl111_vexpress.h | 29 |
9 files changed, 407 insertions, 23 deletions
diff --git a/drivers/gpu/drm/pl111/Makefile b/drivers/gpu/drm/pl111/Makefile index 9c5e8dba8ac6..0c70f0e91d21 100644 --- a/drivers/gpu/drm/pl111/Makefile +++ b/drivers/gpu/drm/pl111/Makefile @@ -3,6 +3,8 @@ pl111_drm-y += pl111_display.o \ pl111_versatile.o \ pl111_drv.o +pl111_drm-$(CONFIG_ARCH_VEXPRESS) += pl111_vexpress.o +pl111_drm-$(CONFIG_ARCH_NOMADIK) += pl111_nomadik.o pl111_drm-$(CONFIG_DEBUG_FS) += pl111_debugfs.o obj-$(CONFIG_DRM_PL111) += pl111_drm.o diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 19b0d006a54a..754f6b25f265 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -63,7 +63,7 @@ pl111_mode_valid(struct drm_crtc *crtc, * We use the pixelclock to also account for interlaced modes, the * resulting bandwidth is in bytes per second. */ - bw = mode->clock * 1000; /* In Hz */ + bw = mode->clock * 1000ULL; /* In Hz */ bw = bw * mode->hdisplay * mode->vdisplay * cpp; bw = div_u64(bw, mode->htotal * mode->vtotal); @@ -223,48 +223,84 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, /* Hard-code TFT panel */ cntl = CNTL_LCDEN | CNTL_LCDTFT | CNTL_LCDVCOMP(1); + /* On the ST Micro variant, assume all 24 bits are connected */ + if (priv->variant->st_bitmux_control) + cntl |= CNTL_ST_CDWID_24; - /* Note that the the hardware's format reader takes 'r' from + /* + * Note that the the ARM hardware's format reader takes 'r' from * the low bit, while DRM formats list channels from high bit - * to low bit as you read left to right. + * to low bit as you read left to right. The ST Micro version of + * the PL110 (LCDC) however uses the standard DRM format. */ switch (fb->format->format) { + case DRM_FORMAT_BGR888: + /* Only supported on the ST Micro variant */ + if (priv->variant->st_bitmux_control) + cntl |= CNTL_ST_LCDBPP24_PACKED | CNTL_BGR; + break; + case DRM_FORMAT_RGB888: + /* Only supported on the ST Micro variant */ + if (priv->variant->st_bitmux_control) + cntl |= CNTL_ST_LCDBPP24_PACKED; + break; case DRM_FORMAT_ABGR8888: case DRM_FORMAT_XBGR8888: - cntl |= CNTL_LCDBPP24; + if (priv->variant->st_bitmux_control) + cntl |= CNTL_LCDBPP24 | CNTL_BGR; + else + cntl |= CNTL_LCDBPP24; break; case DRM_FORMAT_ARGB8888: case DRM_FORMAT_XRGB8888: - cntl |= CNTL_LCDBPP24 | CNTL_BGR; + if (priv->variant->st_bitmux_control) + cntl |= CNTL_LCDBPP24; + else + cntl |= CNTL_LCDBPP24 | CNTL_BGR; break; case DRM_FORMAT_BGR565: if (priv->variant->is_pl110) cntl |= CNTL_LCDBPP16; + else if (priv->variant->st_bitmux_control) + cntl |= CNTL_LCDBPP16 | CNTL_ST_1XBPP_565 | CNTL_BGR; else cntl |= CNTL_LCDBPP16_565; break; case DRM_FORMAT_RGB565: if (priv->variant->is_pl110) - cntl |= CNTL_LCDBPP16; + cntl |= CNTL_LCDBPP16 | CNTL_BGR; + else if (priv->variant->st_bitmux_control) + cntl |= CNTL_LCDBPP16 | CNTL_ST_1XBPP_565; else - cntl |= CNTL_LCDBPP16_565; - cntl |= CNTL_BGR; + cntl |= CNTL_LCDBPP16_565 | CNTL_BGR; break; case DRM_FORMAT_ABGR1555: case DRM_FORMAT_XBGR1555: cntl |= CNTL_LCDBPP16; + if (priv->variant->st_bitmux_control) + cntl |= CNTL_ST_1XBPP_5551 | CNTL_BGR; break; case DRM_FORMAT_ARGB1555: case DRM_FORMAT_XRGB1555: - cntl |= CNTL_LCDBPP16 | CNTL_BGR; + cntl |= CNTL_LCDBPP16; + if (priv->variant->st_bitmux_control) + cntl |= CNTL_ST_1XBPP_5551; + else + cntl |= CNTL_BGR; break; case DRM_FORMAT_ABGR4444: case DRM_FORMAT_XBGR4444: cntl |= CNTL_LCDBPP16_444; + if (priv->variant->st_bitmux_control) + cntl |= CNTL_ST_1XBPP_444 | CNTL_BGR; break; case DRM_FORMAT_ARGB4444: case DRM_FORMAT_XRGB4444: - cntl |= CNTL_LCDBPP16_444 | CNTL_BGR; + cntl |= CNTL_LCDBPP16_444; + if (priv->variant->st_bitmux_control) + cntl |= CNTL_ST_1XBPP_444; + else + cntl |= CNTL_BGR; break; default: WARN_ONCE(true, "Unknown FB format 0x%08x\n", diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 8639b2d4ddf7..1aa015ccacef 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -36,11 +36,14 @@ struct drm_minor; * struct pl111_variant_data - encodes IP differences * @name: the name of this variant * @is_pl110: this is the early PL110 variant + * @is_lcdc: this is the ST Microelectronics Nomadik LCDC variant * @external_bgr: this is the Versatile Pl110 variant with external * BGR/RGB routing * @broken_clockdivider: the clock divider is broken and we need to * use the supplied clock directly * @broken_vblank: the vblank IRQ is broken on this variant + * @st_bitmux_control: this variant is using the ST Micro bitmux + * extensions to the control register * @formats: array of supported pixel formats on this variant * @nformats: the length of the array of supported pixel formats * @fb_bpp: desired bits per pixel on the default framebuffer @@ -48,9 +51,11 @@ struct drm_minor; struct pl111_variant_data { const char *name; bool is_pl110; + bool is_lcdc; bool external_bgr; bool broken_clockdivider; bool broken_vblank; + bool st_bitmux_control; const u32 *formats; unsigned int nformats; unsigned int fb_bpp; @@ -79,6 +84,7 @@ struct pl111_drm_dev_private { const struct pl111_variant_data *variant; void (*variant_display_enable) (struct drm_device *drm, u32 format); void (*variant_display_disable) (struct drm_device *drm); + bool use_device_memory; }; int pl111_display_init(struct drm_device *dev); diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 4621259d5387..47fe30223444 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -60,6 +60,7 @@ #include <linux/slab.h> #include <linux/of.h> #include <linux/of_graph.h> +#include <linux/of_reserved_mem.h> #include <drm/drmP.h> #include <drm/drm_atomic_helper.h> @@ -74,6 +75,7 @@ #include "pl111_drm.h" #include "pl111_versatile.h" +#include "pl111_nomadik.h" #define DRIVER_DESC "DRM module for PL111" @@ -207,6 +209,24 @@ finish: return ret; } +static struct drm_gem_object * +pl111_gem_import_sg_table(struct drm_device *dev, + struct dma_buf_attachment *attach, + struct sg_table *sgt) +{ + struct pl111_drm_dev_private *priv = dev->dev_private; + + /* + * When using device-specific reserved memory we can't import + * DMA buffers: those are passed by reference in any global + * memory and we can only handle a specific range of memory. + */ + if (priv->use_device_memory) + return ERR_PTR(-EINVAL); + + return drm_gem_cma_prime_import_sg_table(dev, attach, sgt); +} + DEFINE_DRM_GEM_CMA_FOPS(drm_fops); static struct drm_driver pl111_drm_driver = { @@ -227,9 +247,11 @@ static struct drm_driver pl111_drm_driver = { .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_import = drm_gem_prime_import, - .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, + .gem_prime_import_sg_table = pl111_gem_import_sg_table, .gem_prime_export = drm_gem_prime_export, .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, + .gem_prime_mmap = drm_gem_cma_prime_mmap, + .gem_prime_vmap = drm_gem_cma_prime_vmap, #if defined(CONFIG_DEBUG_FS) .debugfs_init = pl111_debugfs_init, @@ -257,14 +279,20 @@ static int pl111_amba_probe(struct amba_device *amba_dev, drm->dev_private = priv; priv->variant = variant; + ret = of_reserved_mem_device_init(dev); + if (!ret) { + dev_info(dev, "using device-specific reserved memory\n"); + priv->use_device_memory = true; + } + if (of_property_read_u32(dev->of_node, "max-memory-bandwidth", &priv->memory_bw)) { dev_info(dev, "no max memory bandwidth specified, assume unlimited\n"); priv->memory_bw = 0; } - /* The two variants swap this register */ - if (variant->is_pl110) { + /* The two main variants swap this register */ + if (variant->is_pl110 || variant->is_lcdc) { priv->ienb = CLCD_PL110_IENB; priv->ctrl = CLCD_PL110_CNTL; } else { @@ -275,13 +303,16 @@ static int pl111_amba_probe(struct amba_device *amba_dev, priv->regs = devm_ioremap_resource(dev, &amba_dev->res); if (IS_ERR(priv->regs)) { dev_err(dev, "%s failed mmio\n", __func__); - return PTR_ERR(priv->regs); + ret = PTR_ERR(priv->regs); + goto dev_put; } /* This may override some variant settings */ ret = pl111_versatile_init(dev, priv); if (ret) - goto dev_unref; + goto dev_put; + + pl111_nomadik_init(dev); /* turn off interrupts before requesting the irq */ writel(0, priv->regs + priv->ienb); @@ -295,21 +326,24 @@ static int pl111_amba_probe(struct amba_device *amba_dev, ret = pl111_modeset_init(drm); if (ret != 0) - goto dev_unref; + goto dev_put; ret = drm_dev_register(drm, 0); if (ret < 0) - goto dev_unref; + goto dev_put; return 0; -dev_unref: - drm_dev_unref(drm); +dev_put: + drm_dev_put(drm); + of_reserved_mem_device_release(dev); + return ret; } static int pl111_amba_remove(struct amba_device *amba_dev) { + struct device *dev = &amba_dev->dev; struct drm_device *drm = amba_get_drvdata(amba_dev); struct pl111_drm_dev_private *priv = drm->dev_private; @@ -318,7 +352,8 @@ static int pl111_amba_remove(struct amba_device *amba_dev) if (priv->panel) drm_panel_bridge_remove(priv->bridge); drm_mode_config_cleanup(drm); - drm_dev_unref(drm); + drm_dev_put(drm); + of_reserved_mem_device_release(dev); return 0; } @@ -370,16 +405,50 @@ static const struct pl111_variant_data pl111_variant = { .fb_bpp = 32, }; +static const u32 pl110_nomadik_pixel_formats[] = { + DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_BGR565, + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR1555, + DRM_FORMAT_XBGR1555, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, + DRM_FORMAT_ABGR4444, + DRM_FORMAT_XBGR4444, + DRM_FORMAT_ARGB4444, + DRM_FORMAT_XRGB4444, +}; + +static const struct pl111_variant_data pl110_nomadik_variant = { + .name = "LCDC (PL110 Nomadik)", + .formats = pl110_nomadik_pixel_formats, + .nformats = ARRAY_SIZE(pl110_nomadik_pixel_formats), + .is_lcdc = true, + .st_bitmux_control = true, + .broken_vblank = true, + .fb_bpp = 16, +}; + static const struct amba_id pl111_id_table[] = { { .id = 0x00041110, .mask = 0x000fffff, - .data = (void*)&pl110_variant, + .data = (void *)&pl110_variant, + }, + { + .id = 0x00180110, + .mask = 0x00fffffe, + .data = (void *)&pl110_nomadik_variant, }, { .id = 0x00041111, .mask = 0x000fffff, - .data = (void*)&pl111_variant, + .data = (void *)&pl111_variant, }, {0, 0}, }; diff --git a/drivers/gpu/drm/pl111/pl111_nomadik.c b/drivers/gpu/drm/pl111/pl111_nomadik.c new file mode 100644 index 000000000000..6f385e59be22 --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_nomadik.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <linux/device.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> +#include <linux/bitops.h> +#include <linux/module.h> +#include "pl111_nomadik.h" + +#define PMU_CTRL_OFFSET 0x0000 +#define PMU_CTRL_LCDNDIF BIT(26) + +void pl111_nomadik_init(struct device *dev) +{ + struct regmap *pmu_regmap; + + /* + * Just bail out of this is not found, we could be running + * multiplatform on something else than Nomadik. + */ + pmu_regmap = + syscon_regmap_lookup_by_compatible("stericsson,nomadik-pmu"); + if (IS_ERR(pmu_regmap)) + return; + + /* + * This bit in the PMU controller multiplexes the two graphics + * blocks found in the Nomadik STn8815. The other one is called + * MDIF (Master Display Interface) and gets muxed out here. + */ + regmap_update_bits(pmu_regmap, + PMU_CTRL_OFFSET, + PMU_CTRL_LCDNDIF, + 0); + dev_info(dev, "set Nomadik PMU mux to CLCD mode\n"); +} +EXPORT_SYMBOL_GPL(pl111_nomadik_init); diff --git a/drivers/gpu/drm/pl111/pl111_nomadik.h b/drivers/gpu/drm/pl111/pl111_nomadik.h new file mode 100644 index 000000000000..19d663d46353 --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_nomadik.h @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <linux/device.h> + +#ifndef PL111_NOMADIK_H +#define PL111_NOMADIK_H +#endif + +#ifdef CONFIG_ARCH_NOMADIK + +void pl111_nomadik_init(struct device *dev); + +#else + +static inline void pl111_nomadik_init(struct device *dev) +{ +} + +#endif diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index 9302f516045e..b9baefdba38a 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -1,12 +1,14 @@ #include <linux/amba/clcd-regs.h> #include <linux/device.h> #include <linux/of.h> +#include <linux/of_platform.h> #include <linux/regmap.h> #include <linux/mfd/syscon.h> #include <linux/bitops.h> #include <linux/module.h> #include <drm/drmP.h> #include "pl111_versatile.h" +#include "pl111_vexpress.h" #include "pl111_drm.h" static struct regmap *versatile_syscon_map; @@ -22,6 +24,7 @@ enum versatile_clcd { REALVIEW_CLCD_PB11MP, REALVIEW_CLCD_PBA8, REALVIEW_CLCD_PBX, + VEXPRESS_CLCD_V2M, }; static const struct of_device_id versatile_clcd_of_match[] = { @@ -53,6 +56,10 @@ static const struct of_device_id versatile_clcd_of_match[] = { .compatible = "arm,realview-pbx-syscon", .data = (void *)REALVIEW_CLCD_PBX, }, + { + .compatible = "arm,vexpress-muxfpga", + .data = (void *)VEXPRESS_CLCD_V2M, + }, {}, }; @@ -286,12 +293,26 @@ static const struct pl111_variant_data pl111_realview = { .fb_bpp = 16, }; +/* + * Versatile Express PL111 variant, again we just push the maximum + * BPP to 16 to be able to get 1024x768 without saturating the memory + * bus. The clockdivider also seems broken on the Versatile Express. + */ +static const struct pl111_variant_data pl111_vexpress = { + .name = "PL111 Versatile Express", + .formats = pl111_realview_pixel_formats, + .nformats = ARRAY_SIZE(pl111_realview_pixel_formats), + .fb_bpp = 16, + .broken_clockdivider = true, +}; + int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) { const struct of_device_id *clcd_id; enum versatile_clcd versatile_clcd_type; struct device_node *np; struct regmap *map; + int ret; np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match, &clcd_id); @@ -301,7 +322,33 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) } versatile_clcd_type = (enum versatile_clcd)clcd_id->data; - map = syscon_node_to_regmap(np); + /* Versatile Express special handling */ + if (versatile_clcd_type == VEXPRESS_CLCD_V2M) { + struct platform_device *pdev; + + /* Registers a driver for the muxfpga */ + ret = vexpress_muxfpga_init(); + if (ret) { + dev_err(dev, "unable to initialize muxfpga driver\n"); + return ret; + } + + /* Call into deep Vexpress configuration API */ + pdev = of_find_device_by_node(np); + if (!pdev) { + dev_err(dev, "can't find the sysreg device, deferring\n"); + return -EPROBE_DEFER; + } + map = dev_get_drvdata(&pdev->dev); + if (!map) { + dev_err(dev, "sysreg has not yet probed\n"); + platform_device_put(pdev); + return -EPROBE_DEFER; + } + } else { + map = syscon_node_to_regmap(np); + } + if (IS_ERR(map)) { dev_err(dev, "no Versatile syscon regmap\n"); return PTR_ERR(map); @@ -340,6 +387,13 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) priv->variant_display_disable = pl111_realview_clcd_disable; dev_info(dev, "set up callbacks for RealView PL111\n"); break; + case VEXPRESS_CLCD_V2M: + priv->variant = &pl111_vexpress; + dev_info(dev, "initializing Versatile Express PL111\n"); + ret = pl111_vexpress_clcd_init(dev, priv, map); + if (ret) + return ret; + break; default: dev_info(dev, "unknown Versatile system controller\n"); break; diff --git a/drivers/gpu/drm/pl111/pl111_vexpress.c b/drivers/gpu/drm/pl111/pl111_vexpress.c new file mode 100644 index 000000000000..a534b225e31b --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_vexpress.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Versatile Express PL111 handling + * Copyright (C) 2018 Linus Walleij + * + * This module binds to the "arm,vexpress-muxfpga" device on the + * Versatile Express configuration bus and sets up which CLCD instance + * gets muxed out on the DVI bridge. + */ +#include <linux/device.h> +#include <linux/module.h> +#include <linux/regmap.h> +#include <linux/vexpress.h> +#include <linux/platform_device.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_platform.h> +#include "pl111_drm.h" +#include "pl111_vexpress.h" + +#define VEXPRESS_FPGAMUX_MOTHERBOARD 0x00 +#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_1 0x01 +#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_2 0x02 + +int pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map) +{ + struct device_node *root; + struct device_node *child; + struct device_node *ct_clcd = NULL; + bool has_coretile_clcd = false; + bool has_coretile_hdlcd = false; + bool mux_motherboard = true; + u32 val; + int ret; + + /* + * Check if we have a CLCD or HDLCD on the core tile by checking if a + * CLCD or HDLCD is available in the root of the device tree. + */ + root = of_find_node_by_path("/"); + if (!root) + return -EINVAL; + + for_each_available_child_of_node(root, child) { + if (of_device_is_compatible(child, "arm,pl111")) { + has_coretile_clcd = true; + ct_clcd = child; + break; + } + if (of_device_is_compatible(child, "arm,hdlcd")) { + has_coretile_hdlcd = true; + break; + } + } + + /* + * If there is a coretile HDLCD and it has a driver, + * do not mux the CLCD on the motherboard to the DVI. + */ + if (has_coretile_hdlcd && IS_ENABLED(CONFIG_DRM_HDLCD)) + mux_motherboard = false; + + /* + * On the Vexpress CA9 we let the CLCD on the coretile + * take precedence, so also in this case do not mux the + * motherboard to the DVI. + */ + if (has_coretile_clcd) + mux_motherboard = false; + + if (mux_motherboard) { + dev_info(dev, "DVI muxed to motherboard CLCD\n"); + val = VEXPRESS_FPGAMUX_MOTHERBOARD; + } else if (ct_clcd == dev->of_node) { + dev_info(dev, + "DVI muxed to daughterboard 1 (core tile) CLCD\n"); + val = VEXPRESS_FPGAMUX_DAUGHTERBOARD_1; + } else { + dev_info(dev, "core tile graphics present\n"); + dev_info(dev, "this device will be deactivated\n"); + return -ENODEV; + } + + ret = regmap_write(map, 0, val); + if (ret) { + dev_err(dev, "error setting DVI muxmode\n"); + return -ENODEV; + } + + return 0; +} + +/* + * This sets up the regmap pointer that will then be retrieved by + * the detection code in pl111_versatile.c and passed in to the + * pl111_vexpress_clcd_init() function above. + */ +static int vexpress_muxfpga_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *map; + + map = devm_regmap_init_vexpress_config(&pdev->dev); + if (IS_ERR(map)) + return PTR_ERR(map); + dev_set_drvdata(dev, map); + + return 0; +} + +static const struct of_device_id vexpress_muxfpga_match[] = { + { .compatible = "arm,vexpress-muxfpga", } +}; + +static struct platform_driver vexpress_muxfpga_driver = { + .driver = { + .name = "vexpress-muxfpga", + .of_match_table = of_match_ptr(vexpress_muxfpga_match), + }, + .probe = vexpress_muxfpga_probe, +}; + +int vexpress_muxfpga_init(void) +{ + int ret; + + ret = platform_driver_register(&vexpress_muxfpga_driver); + /* -EBUSY just means this driver is already registered */ + if (ret == -EBUSY) + ret = 0; + return ret; +} diff --git a/drivers/gpu/drm/pl111/pl111_vexpress.h b/drivers/gpu/drm/pl111/pl111_vexpress.h new file mode 100644 index 000000000000..5d3681bb4c00 --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_vexpress.h @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 + +struct device; +struct pl111_drm_dev_private; +struct regmap; + +#ifdef CONFIG_ARCH_VEXPRESS + +int pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map); + +int vexpress_muxfpga_init(void); + +#else + +static inline int pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map) +{ + return -ENODEV; +} + +static inline int vexpress_muxfpga_init(void) +{ + return 0; +} + +#endif |