diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_hdcp.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 84 |
1 files changed, 71 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index 40c516e90193..90868e156c69 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -294,37 +294,39 @@ struct hdcp2_dp_msg_data { bool msg_detectable; u32 timeout; u32 timeout2; /* Added for non_paired situation */ + /* Timeout to read entire msg */ + u32 msg_read_timeout; }; static const struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = { - { HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 }, + { HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0, 0}, { HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET, - false, HDCP_2_2_CERT_TIMEOUT_MS, 0 }, + false, HDCP_2_2_CERT_TIMEOUT_MS, 0, HDCP_2_2_DP_CERT_READ_TIMEOUT_MS}, { HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET, - false, 0, 0 }, + false, 0, 0, 0 }, { HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET, - false, 0, 0 }, + false, 0, 0, 0 }, { HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET, true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS, - HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS }, + HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS, HDCP_2_2_DP_HPRIME_READ_TIMEOUT_MS}, { HDCP_2_2_AKE_SEND_PAIRING_INFO, DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true, - HDCP_2_2_PAIRING_TIMEOUT_MS, 0 }, - { HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 }, + HDCP_2_2_PAIRING_TIMEOUT_MS, 0, HDCP_2_2_DP_PAIRING_READ_TIMEOUT_MS }, + { HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0, 0 }, { HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET, - false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 }, + false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0, 0 }, { HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false, - 0, 0 }, + 0, 0, 0 }, { HDCP_2_2_REP_SEND_RECVID_LIST, DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true, - HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 }, + HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0, 0 }, { HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false, - 0, 0 }, + 0, 0, 0 }, { HDCP_2_2_REP_STREAM_MANAGE, DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false, - 0, 0 }, + 0, 0, 0}, { HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET, - false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 }, + false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0, 0 }, /* local define to shovel this through the write_2_2 interface */ #define HDCP_2_2_ERRATA_DP_STREAM_TYPE 50 { HDCP_2_2_ERRATA_DP_STREAM_TYPE, @@ -478,6 +480,23 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port, return size; } +static int +get_rxinfo_hdcp_1_dev_downstream(struct intel_digital_port *dig_port, bool *hdcp_1_x) +{ + u8 rx_info[HDCP_2_2_RXINFO_LEN]; + int ret; + + ret = drm_dp_dpcd_read(&dig_port->dp.aux, + DP_HDCP_2_2_REG_RXINFO_OFFSET, + (void *)rx_info, HDCP_2_2_RXINFO_LEN); + + if (ret != HDCP_2_2_RXINFO_LEN) + return ret >= 0 ? -EIO : ret; + + *hdcp_1_x = HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) ? true : false; + return 0; +} + static ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port) { @@ -513,6 +532,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, u8 *byte = buf; ssize_t ret, bytes_to_recv, len; const struct hdcp2_dp_msg_data *hdcp2_msg_data; + ktime_t msg_end; + bool msg_expired; hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id); if (!hdcp2_msg_data) @@ -539,6 +560,11 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, len = bytes_to_recv > DP_AUX_MAX_PAYLOAD_BYTES ? DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_recv; + /* Entire msg read timeout since initiate of msg read */ + if (bytes_to_recv == size - 1 && hdcp2_msg_data->msg_read_timeout > 0) + msg_end = ktime_add_ms(ktime_get_raw(), + hdcp2_msg_data->msg_read_timeout); + ret = drm_dp_dpcd_read(&dig_port->dp.aux, offset, (void *)byte, len); if (ret < 0) { @@ -551,6 +577,16 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port, byte += ret; offset += ret; } + + if (hdcp2_msg_data->msg_read_timeout > 0) { + msg_expired = ktime_after(ktime_get_raw(), msg_end); + if (msg_expired) { + drm_dbg_kms(&i915->drm, "msg_id %d, entire msg read timeout(mSec): %d\n", + msg_id, hdcp2_msg_data->msg_read_timeout); + return -ETIMEDOUT; + } + } + byte = buf; *byte = msg_id; @@ -626,6 +662,27 @@ int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port, return 0; } +static +int intel_dp_mst_streams_type1_capable(struct intel_connector *connector, + bool *capable) +{ + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); + int ret; + bool hdcp_1_x; + + ret = get_rxinfo_hdcp_1_dev_downstream(dig_port, &hdcp_1_x); + if (ret) { + drm_dbg_kms(&i915->drm, + "[%s:%d] failed to read RxInfo ret=%d\n", + connector->base.name, connector->base.base.id, ret); + return ret; + } + + *capable = !hdcp_1_x; + return 0; +} + static const struct intel_hdcp_shim intel_dp_hdcp_shim = { .write_an_aksv = intel_dp_hdcp_write_an_aksv, .read_bksv = intel_dp_hdcp_read_bksv, @@ -774,6 +831,7 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { .stream_2_2_encryption = intel_dp_mst_hdcp2_stream_encryption, .check_2_2_link = intel_dp_mst_hdcp2_check_link, .hdcp_2_2_capable = intel_dp_hdcp2_capable, + .streams_type1_capable = intel_dp_mst_streams_type1_capable, .protocol = HDCP_PROTOCOL_DP, }; |