diff options
Diffstat (limited to 'arch/arm/boot/dts/nxp')
106 files changed, 1483 insertions, 313 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index 3629e343d322..a724d1a7a9a0 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -47,6 +47,8 @@ dtb-$(CONFIG_SOC_IMX53) += \ imx53-qsb.dtb \ imx53-qsrb.dtb \ imx53-sk-imx53.dtb \ + imx53-sk-imx53-atm0700d4-lvds.dtb \ + imx53-sk-imx53-atm0700d4-rgb.dtb \ imx53-smd.dtb \ imx53-tx53-x03x.dtb \ imx53-tx53-x13x.dtb \ @@ -244,6 +246,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-udoo.dtb \ imx6q-utilite-pro.dtb \ imx6q-var-dt6customboard.dtb \ + imx6q-var-mx6customboard.dtb \ imx6q-vicut1.dtb \ imx6q-wandboard.dtb \ imx6q-wandboard-revb1.dtb \ diff --git a/arch/arm/boot/dts/nxp/imx/imx1-ads.dts b/arch/arm/boot/dts/nxp/imx/imx1-ads.dts index 5833fb6f15d8..2c817c4a4c68 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1-ads.dts +++ b/arch/arm/boot/dts/nxp/imx/imx1-ads.dts @@ -65,7 +65,7 @@ pinctrl-0 = <&pinctrl_weim>; status = "okay"; - nor: nor@0,0 { + nor: flash@0,0 { compatible = "cfi-flash"; reg = <0 0x00000000 0x02000000>; bank-width = <4>; diff --git a/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts b/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts index 1f11e9542a72..e66eef87a7a4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts +++ b/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts @@ -45,7 +45,7 @@ pinctrl-0 = <&pinctrl_weim>; status = "okay"; - nor: nor@0,0 { + nor: flash@0,0 { compatible = "cfi-flash"; reg = <0 0x00000000 0x02000000>; bank-width = <2>; diff --git a/arch/arm/boot/dts/nxp/imx/imx1.dtsi b/arch/arm/boot/dts/nxp/imx/imx1.dtsi index e312f1e74e2f..1ac10965fdfd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx1.dtsi @@ -68,7 +68,7 @@ interrupt-parent = <&aitc>; ranges; - aipi@200000 { + bus@200000 { compatible = "fsl,aipi-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -155,7 +155,7 @@ }; }; - aipi@210000 { + bus@210000 { compatible = "fsl,aipi-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -268,9 +268,12 @@ status = "disabled"; }; - esram: esram@300000 { + esram: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x20000>; + ranges = <0 0x00300000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; }; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi index 0703f62d10d1..93a6e4e680b4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi @@ -27,7 +27,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - pcf8563@51 { + rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts index fc8a502fc957..6cddb2cc36fe 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts +++ b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts @@ -16,7 +16,7 @@ bus-width = <18>; display-timings { native-mode = <&qvga_timings>; - qvga_timings: 320x240 { + qvga_timings: timing0 { clock-frequency = <6500000>; hactive = <320>; vactive = <240>; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts index 80a7f96de4c6..64b2ffac463b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts +++ b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts @@ -16,7 +16,7 @@ bus-width = <18>; display-timings { native-mode = <&dvi_svga_timings>; - dvi_svga_timings: 800x600 { + dvi_svga_timings: timing0 { clock-frequency = <40000000>; hactive = <800>; vactive = <600>; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts index 24027a1fb46d..fb074bfdaa8d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts +++ b/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts @@ -16,7 +16,7 @@ bus-width = <18>; display-timings { native-mode = <&dvi_vga_timings>; - dvi_vga_timings: 640x480 { + dvi_vga_timings: timing0 { clock-frequency = <31250000>; hactive = <640>; vactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts b/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts index 04f4b127a172..dd176fb54e58 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx25-pdk.dts @@ -68,7 +68,7 @@ bus-width = <18>; display-timings { native-mode = <&wvga_timings>; - wvga_timings: 640x480 { + wvga_timings: timing0 { hactive = <640>; vactive = <480>; hback-porch = <45>; @@ -122,6 +122,7 @@ codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; clocks = <&clks 129>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; diff --git a/arch/arm/boot/dts/nxp/imx/imx25.dtsi b/arch/arm/boot/dts/nxp/imx/imx25.dtsi index 5f90d72b840b..9cfff2151b7e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx25.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx25.dtsi @@ -68,6 +68,16 @@ }; }; + usbphy0: usb-phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + + usbphy1: usb-phy1 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; @@ -93,7 +103,7 @@ compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; reg = <0x43f80000 0x4000>; clocks = <&clks 48>; - clock-names = ""; + clock-names = "ipg"; interrupts = <3>; status = "disabled"; }; @@ -104,7 +114,7 @@ compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; reg = <0x43f84000 0x4000>; clocks = <&clks 48>; - clock-names = ""; + clock-names = "ipg"; interrupts = <10>; status = "disabled"; }; @@ -151,7 +161,7 @@ compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; reg = <0x43f98000 0x4000>; clocks = <&clks 48>; - clock-names = ""; + clock-names = "ipg"; interrupts = <4>; status = "disabled"; }; @@ -178,12 +188,9 @@ }; kpp: kpp@43fa8000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "fsl,imx25-kpp", "fsl,imx21-kpp"; reg = <0x43fa8000 0x4000>; clocks = <&clks 102>; - clock-names = ""; interrupts = <24>; status = "disabled"; }; @@ -529,7 +536,6 @@ compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; reg = <0x53fdc000 0x4000>; clocks = <&clks 126>; - clock-names = ""; interrupts = <55>; }; @@ -543,7 +549,7 @@ }; iim: efuse@53ff0000 { - compatible = "fsl,imx25-iim", "fsl,imx27-iim"; + compatible = "fsl,imx25-iim"; reg = <0x53ff0000 0x4000>; interrupts = <19>; clocks = <&clks 99>; @@ -583,10 +589,9 @@ }; dryice@53ffc000 { - compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; + compatible = "fsl,imx25-rtc"; reg = <0x53ffc000 0x4000>; clocks = <&clks 81>; - clock-names = "ipg"; interrupts = <25 56>; }; }; @@ -594,9 +599,12 @@ iram: sram@78000000 { compatible = "mmio-sram"; reg = <0x78000000 0x20000>; + ranges = <0 0x78000000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; }; - emi@80000000 { + bus@80000000 { compatible = "fsl,emi-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -616,22 +624,4 @@ }; }; }; - - usbphy { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usbphy0: usb-phy@0 { - reg = <0>; - compatible = "usb-nop-xceiv"; - #phy-cells = <0>; - }; - - usbphy1: usb-phy@1 { - reg = <1>; - compatible = "usb-nop-xceiv"; - #phy-cells = <0>; - }; - }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts b/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts index a21f1f7c24b8..849306cb4532 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts @@ -16,7 +16,7 @@ fsl,pcr = <0xfae80083>; /* non-standard but required */ display-timings { native-mode = <&timing0>; - timing0: 800x480 { + timing0: timing0 { clock-frequency = <33000033>; hactive = <800>; vactive = <480>; @@ -47,7 +47,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; - user { + led-user { label = "Heartbeat"; gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi index 74110bbcd9d4..c7e923584878 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi @@ -33,7 +33,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - pcf8563@51 { + rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; }; @@ -90,7 +90,7 @@ &weim { status = "okay"; - nor: nor@0,0 { + nor: flash@0,0 { #address-cells = <1>; #size-cells = <1>; compatible = "cfi-flash"; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts index 145e459625b3..d78793601306 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts @@ -16,7 +16,7 @@ display-timings { native-mode = <&timing0>; - timing0: 320x240 { + timing0: timing0 { clock-frequency = <6500000>; hactive = <320>; vactive = <240>; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-pdk.dts b/arch/arm/boot/dts/nxp/imx/imx27-pdk.dts index 35123b7cb6b3..21d436972aa4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-pdk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-pdk.dts @@ -14,18 +14,12 @@ reg = <0xa0000000 0x08000000>; }; - usbphy { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usbphy0: usbphy@0 { - compatible = "usb-nop-xceiv"; - reg = <0>; - clocks = <&clks IMX27_CLK_DUMMY>; - clock-names = "main_clk"; - #phy-cells = <0>; - }; + + usbphy0: usbphy { + compatible = "usb-nop-xceiv"; + clocks = <&clks IMX27_CLK_DUMMY>; + clock-names = "main_clk"; + #phy-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts index 25442eba21c1..27c93b9fe049 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts @@ -19,7 +19,7 @@ fsl,pcr = <0xf0c88080>; /* non-standard but required */ display-timings { native-mode = <&timing0>; - timing0: 640x480 { + timing0: timing0 { hactive = <640>; vactive = <480>; hback-porch = <112>; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi index 303f920201c5..abc9233c5a1b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi @@ -34,7 +34,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - at24@52 { + eeprom@52 { compatible = "atmel,24c32"; pagesize = <32>; reg = <0x52>; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts index 7f0cd4d3ec2d..b8048e12e3d9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts @@ -19,7 +19,7 @@ display-timings { native-mode = <&timing0>; - timing0: 240x320 { + timing0: timing0 { clock-frequency = <5500000>; hactive = <240>; vactive = <320>; @@ -48,15 +48,12 @@ regulator-always-on; }; - usbphy { - usbphy2: usbphy@2 { - compatible = "usb-nop-xceiv"; - reg = <2>; - vcc-supply = <®_5v0>; - clocks = <&clks IMX27_CLK_DUMMY>; - clock-names = "main_clk"; - #phy-cells = <0>; - }; + usbphy2: usbphy { + compatible = "usb-nop-xceiv"; + vcc-supply = <®_5v0>; + clocks = <&clks IMX27_CLK_DUMMY>; + clock-names = "main_clk"; + #phy-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi index 7191e10712b9..e958d7286ae9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi @@ -29,19 +29,13 @@ regulator-max-microvolt = <5000000>; }; - usbphy { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - usbphy0: usbphy@0 { - compatible = "usb-nop-xceiv"; - reg = <0>; - vcc-supply = <&sw3_reg>; - clocks = <&clks IMX27_CLK_DUMMY>; - clock-names = "main_clk"; - #phy-cells = <0>; - }; + + usbphy0: usbphy { + compatible = "usb-nop-xceiv"; + vcc-supply = <&sw3_reg>; + clocks = <&clks IMX27_CLK_DUMMY>; + clock-names = "main_clk"; + #phy-cells = <0>; }; }; @@ -49,12 +43,12 @@ status = "okay"; /* SSI0 <=> PINS_4 (MC13783 Audio) */ - ssi0 { + mux-ssi0 { fsl,audmux-port = <0>; fsl,port-config = <0xcb205000>; }; - pins4 { + mux-pins4 { fsl,audmux-port = <2>; fsl,port-config = <0x00001000>; }; @@ -180,13 +174,13 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - at24@52 { + eeprom@52 { compatible = "atmel,24c32"; pagesize = <32>; reg = <0x52>; }; - pcf8563@51 { + rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; }; @@ -314,7 +308,7 @@ &weim { status = "okay"; - nor: nor@0,0 { + nor: flash@0,0 { compatible = "cfi-flash"; reg = <0 0x00000000 0x02000000>; bank-width = <2>; diff --git a/arch/arm/boot/dts/nxp/imx/imx27.dtsi b/arch/arm/boot/dts/nxp/imx/imx27.dtsi index faba12ee7465..ec472695c71e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27.dtsi @@ -81,7 +81,7 @@ interrupt-parent = <&aitc>; ranges; - aipi1: aipi@10000000 { /* AIPI1 */ + aipi1: bus@10000000 { /* AIPI1 */ compatible = "fsl,aipi-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -453,7 +453,7 @@ }; }; - aipi2: aipi@10020000 { /* AIPI2 */ + aipi2: bus@10020000 { /* AIPI2 */ compatible = "fsl,aipi-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -588,6 +588,9 @@ iram: sram@ffff4c00 { compatible = "mmio-sram"; reg = <0xffff4c00 0xb400>; + ranges = <0 0xffff4c00 0xb400>; + #address-cells = <1>; + #size-cells = <1>; }; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts b/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts index 5d4b29d76585..7cd17b43b4b2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-zii-rdu1.dts @@ -119,8 +119,8 @@ compatible = "i2c-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_swi2c>; - gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */ - <&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */ + sda-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; i2c-gpio,delay-us = <50>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51.dtsi index 2b3195f5e32c..c96d6311dfa7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -651,7 +651,7 @@ }; sahara: crypto@83ff8000 { - compatible = "fsl,imx53-sahara", "fsl,imx51-sahara"; + compatible = "fsl,imx53-sahara"; reg = <0x83ff8000 0x4000>; interrupts = <19 20>; clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>, diff --git a/arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts b/arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts index 055d23a9aee7..0814f5665a59 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts @@ -22,7 +22,7 @@ }; display-0 { - #address-cells =<1>; + #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx-parallel-display"; interface-pix-fmt = "rgb24"; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4-lvds.dts b/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4-lvds.dts new file mode 100644 index 000000000000..b1c1e7c759b3 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4-lvds.dts @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2023 Linaro Ltd. + +/dts-v1/; + +#include <dt-bindings/pwm/pwm.h> +#include "imx53-sk-imx53-atm0700d4.dtsi" + +/ { + lvds-decoder { + compatible = "ti,sn65lvds94", "lvds-decoder"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_decoder_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + + port@1 { + reg = <1>; + + lvds_decoder_out: endpoint { + remote-endpoint = <&panel_rgb_in>; + }; + }; + }; + }; +}; + +&iomuxc { + pinctrl_lvds0: lvds0grp { + /* LVDS pins only have pin mux configuration */ + fsl,pins = < + MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 + MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 + MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 + MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 + MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 + >; + }; + + pinctrl_spi_gpio: spigrp { + fsl,pins = < + MX53_PAD_EIM_A22__GPIO2_16 0x1f4 + MX53_PAD_EIM_A21__GPIO2_17 0x1f4 + MX53_PAD_EIM_A16__GPIO2_22 0x1f4 + MX53_PAD_EIM_A18__GPIO2_20 0x1f4 + >; + }; +}; + +&ldb { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lvds0>; + status = "okay"; + + lvds0: lvds-channel@0 { + reg = <0>; + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + port@2 { + reg = <2>; + + lvds0_out: endpoint { + remote-endpoint = <&lvds_decoder_in>; + }; + }; + }; +}; + +&panel_rgb_in { + remote-endpoint = <&lvds_decoder_out>; +}; + +&spi_ts { + pinctrl-0 = <&pinctrl_spi_gpio>; + pinctrl-names = "default"; + + sck-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>; + miso-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; +}; + +&touchscreen { + interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_BOTH>; + pendown-gpio = <&gpio3 22 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4-rgb.dts b/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4-rgb.dts new file mode 100644 index 000000000000..2559ada7e401 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4-rgb.dts @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2023 Linaro Ltd. + +/dts-v1/; + +#include <dt-bindings/pwm/pwm.h> +#include "imx53-sk-imx53-atm0700d4.dtsi" + +/ { + display: disp0 { + compatible = "fsl,imx-parallel-display"; + interface-pix-fmt = "rgb24"; + pinctrl-0 = <&pinctrl_rgb24>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + display0_in: endpoint { + remote-endpoint = <&ipu_di0_disp0>; + }; + }; + + port@1 { + reg = <1>; + + display_out: endpoint { + remote-endpoint = <&panel_rgb_in>; + }; + }; + }; + +}; + +&iomuxc { + pinctrl_rgb24: rgb24grp { + fsl,pins = < + MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 + MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 + MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 + MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 + MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 + MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 + MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 + MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 + MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 + MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 + MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 + MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 + MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 + MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 + MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 + MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 + MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 + MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 + MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 + MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 + MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 + MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 + MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 + MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 + MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 + MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 + MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 + MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 + >; + }; + + pinctrl_spi_gpio: spigrp { + fsl,pins = < + MX53_PAD_SD1_DATA1__GPIO1_17 0x1f4 + MX53_PAD_GPIO_7__GPIO1_7 0x1f4 + MX53_PAD_PATA_DATA3__GPIO2_3 0x1f4 + MX53_PAD_PATA_DATA8__GPIO2_8 0x1f4 + >; + }; +}; + +&ipu_di0_disp0 { + remote-endpoint = <&display0_in>; +}; + +&panel { + enable-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; +}; + +&panel_rgb_in { + remote-endpoint = <&display_out>; +}; + +&pwm1 { + status = "disabled"; +}; + +&spi_ts { + pinctrl-0 = <&pinctrl_spi_gpio>; + pinctrl-names = "default"; + + sck-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + miso-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; +}; + +&touchscreen { + interrupts-extended = <&gpio2 6 IRQ_TYPE_EDGE_BOTH>; + pendown-gpio = <&gpio2 6 GPIO_ACTIVE_LOW>; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4.dtsi b/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4.dtsi new file mode 100644 index 000000000000..e395004e80e6 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx53-sk-imx53-atm0700d4.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2023 Linaro Ltd. + +/dts-v1/; + +#include <dt-bindings/pwm/pwm.h> +#include "imx53-sk-imx53.dts" + +/ { + panel: panel-rgb { + compatible = "powertip,ph800480t013-idf02"; + + port { + panel_rgb_in: endpoint { + }; + }; + }; + + spi_ts: spi { + compatible = "spi-gpio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + num-chipselects = <1>; + + touchscreen: touchscreen@0 { + reg = <0>; + compatible = "ti,ads7843"; + spi-max-frequency = <300000>; + + ti,vref-mv = /bits/ 16 <3300>; + ti,x-plate-ohms = /bits/ 16 <450>; + ti,y-plate-ohms = /bits/ 16 <250>; + ti,debounce-tol = /bits/ 16 <10>; + ti,debounce-rep = /bits/ 16 <0>; + touchscreen-size-x = <4096>; + touchscreen-size-y = <4096>; + touchscreen-swapped-x-y; + touchscreen-max-pressure = <100>; + + wakeup-source; + }; + }; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx53.dtsi b/arch/arm/boot/dts/nxp/imx/imx53.dtsi index 0ebc35e6e985..07658e477095 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx53.dtsi @@ -275,7 +275,7 @@ ecspi1: spi@50010000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx53-ecspi"; reg = <0x50010000 0x4000>; interrupts = <36>; clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, @@ -701,7 +701,7 @@ ecspi2: spi@63fac000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx53-ecspi"; reg = <0x63fac000 0x4000>; interrupts = <37>; clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts index 7d4ae113c381..63cdf24eb397 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts @@ -22,7 +22,7 @@ compatible = "ilitek,ili251x"; reg = <0x41>; pinctrl-names = "default"; - pinctrl-0 =<&pinctrl_q7_gpio0>; + pinctrl-0 = <&pinctrl_q7_gpio0>; interrupt-parent = <&gpio5>; interrupts = <2 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&tca6424a 21 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts index 9c5938e16d99..2e75d700efdb 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts @@ -22,7 +22,7 @@ compatible = "ilitek,ili251x"; reg = <0x41>; pinctrl-names = "default"; - pinctrl-0 =<&pinctrl_q7_gpio0>; + pinctrl-0 = <&pinctrl_q7_gpio0>; interrupt-parent = <&gpio5>; interrupts = <2 IRQ_TYPE_EDGE_FALLING>; reset-gpios = <&tca6424a 21 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts index 01df7cffcef2..94625d5d5918 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts @@ -22,7 +22,7 @@ compatible = "eeti,exc80h60"; reg = <0x2a>; pinctrl-names = "default"; - pinctrl-0 =<&pinctrl_q7_gpio0>; + pinctrl-0 = <&pinctrl_q7_gpio0>; interrupt-parent = <&gpio5>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; reset-gpios = <&tca6424a 21 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts index a015453daf10..b3cfa8110ade 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts @@ -22,7 +22,7 @@ compatible = "eeti,exc80h60"; reg = <0x2a>; pinctrl-names = "default"; - pinctrl-0 =<&pinctrl_q7_gpio0>; + pinctrl-0 = <&pinctrl_q7_gpio0>; interrupt-parent = <&gpio5>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; reset-gpios = <&tca6424a 21 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts index b71ee6b79208..7edc788bcb8f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts @@ -22,7 +22,7 @@ compatible = "eeti,exc80h84"; reg = <0x2a>; pinctrl-names = "default"; - pinctrl-0 =<&pinctrl_q7_gpio0>; + pinctrl-0 = <&pinctrl_q7_gpio0>; interrupt-parent = <&gpio5>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; touchscreen-inverted-x; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts index 717decda0ceb..3ac7a4501620 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts @@ -76,6 +76,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_can1_power>; regulator-name = "can1_supply"; + startup-delay-us = <1000>; }; reg_can2_supply: regulator-can2-supply { @@ -85,6 +86,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_can2_power>; regulator-name = "can2_supply"; + startup-delay-us = <1000>; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-b650v3.dts b/arch/arm/boot/dts/nxp/imx/imx6q-b650v3.dts index fa1a1df37cde..b0d345f5d071 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-b650v3.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-b650v3.dts @@ -98,8 +98,8 @@ }; &usbphy1 { - fsl,tx-cal-45-dn-ohms = <55>; - fsl,tx-cal-45-dp-ohms = <55>; + fsl,tx-cal-45-dn-ohms = <54>; + fsl,tx-cal-45-dp-ohms = <54>; fsl,tx-d-cal = <100>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts b/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts index fb9f320103c6..46c6b96d8073 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dts @@ -637,11 +637,11 @@ }; &usbphy1 { - fsl,tx-d-cal = <0x5>; + fsl,tx-d-cal = <79>; }; &usbphy2 { - fsl,tx-d-cal = <0x5>; + fsl,tx-d-cal = <79>; }; &usdhc1 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts b/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts index a3f247c722b4..0342a79ccd5d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts @@ -37,9 +37,9 @@ &clks { assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, - <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + <&clks IMX6QDL_CLK_LDB_DI1_SEL>, <&clks IMX6QDL_CLK_ENET_REF_SEL>; assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, - <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>; + <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clk50m_phy>; }; &hdmi { diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-var-mx6customboard.dts b/arch/arm/boot/dts/nxp/imx/imx6q-var-mx6customboard.dts new file mode 100644 index 000000000000..18a620832a2a --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6q-var-mx6customboard.dts @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Support for Variscite MX6 Carrier-board + * + * Copyright 2016 Variscite, Ltd. All Rights Reserved + * Copyright 2022 Bootlin + */ + +/dts-v1/; + +#include "imx6qdl-var-som.dtsi" +#include <dt-bindings/pwm/pwm.h> + +/ { + model = "Variscite i.MX6 QUAD/DUAL VAR-SOM-MX6 Custom Board"; + compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q"; + + panel0: lvds-panel0 { + compatible = "panel-lvds"; + backlight = <&backlight_lvds>; + width-mm = <152>; + height-mm = <91>; + label = "etm070001adh6"; + data-mapping = "jeida-18"; + + panel-timing { + clock-frequency = <32000000>; + hactive = <800>; + vactive = <480>; + hback-porch = <39>; + hfront-porch = <39>; + vback-porch = <29>; + vfront-porch = <13>; + hsync-len = <47>; + vsync-len = <2>; + }; + + port { + panel_in_lvds0: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; + + panel1: lvds-panel1 { + compatible = "panel-lvds"; + width-mm = <152>; + height-mm = <91>; + data-mapping = "jeida-18"; + + panel-timing { + clock-frequency = <38251000>; + hactive = <800>; + vactive = <600>; + hback-porch = <112>; + hfront-porch = <32>; + vback-porch = <3>; + vfront-porch = <17>; + hsync-len = <80>; + vsync-len = <4>; + }; + + port { + panel_in_lvds1: endpoint { + remote-endpoint = <&lvds1_out>; + }; + }; + }; + + backlight_lvds: backlight-lvds { + compatible = "pwm-backlight"; + pwms = <&pwm2 0 50000 0>; + brightness-levels = <0 4 8 16 32 64 128 248>; + default-brightness-level = <7>; + power-supply = <®_3p3v>; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + touchscreen@24 { + compatible = "cypress,tt21000"; + reg = <0x24>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + vdd-supply = <®_3p3v>; + touchscreen-size-x = <880>; + touchscreen-size-y = <1280>; + }; + + touchscreen@38 { + compatible = "edt,edt-ft5306"; + reg = <0x38>; + interrupt-parent = <&gpio3>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <1800>; + touchscreen-size-y = <1000>; + }; +}; + +&iomuxc { + pinctrl_camera: cameragrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 + MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0 + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 + >; + }; + + pinctrl_ipu1: ipu1grp { + fsl,pins = < + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 + MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usbotg_var: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x17059 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; +}; + +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + port@4 { + reg = <4>; + + lvds0_out: endpoint { + remote-endpoint = <&panel_in_lvds0>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + port@4 { + reg = <4>; + + lvds1_out: endpoint { + remote-endpoint = <&panel_in_lvds1>; + }; + }; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi index 4cc965277c52..2ae93f57fe5a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi @@ -12,6 +12,13 @@ model = "Toradex Apalis iMX6Q/D Module"; compatible = "toradex,apalis_imx6q", "fsl,imx6q"; + aliases { + mmc0 = &usdhc3; /* eMMC */ + mmc1 = &usdhc1; /* MMC1 slot */ + mmc2 = &usdhc2; /* SD1 slot */ + /delete-property/ mmc3; + }; + /* Will be filled by the bootloader */ memory@10000000 { device_type = "memory"; @@ -166,7 +173,7 @@ reg_usb_host_vbus: regulator-usb-host-vbus { compatible = "regulator-fixed"; enable-active-high; - gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; + gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_regulator_usbh_pwr>; regulator-max-microvolt = <5000000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi index 11d9c7a2dacb..55c90f6393ad 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi @@ -12,6 +12,13 @@ model = "Toradex Colibri iMX6DL/S Module"; compatible = "toradex,colibri_imx6dl", "fsl,imx6dl"; + aliases { + mmc0 = &usdhc3; /* eMMC */ + mmc1 = &usdhc1; /* MMC/SD Slot */ + /delete-property/ mmc2; + /delete-property/ mmc3; + }; + backlight: backlight { compatible = "pwm-backlight"; brightness-levels = <0 45 63 88 119 158 203 255>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi index f1a41c76729c..5587069b6052 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi @@ -54,7 +54,7 @@ clk_codec: clock-codec { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <12000000>; + clock-frequency = <12000000>; }; sound { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi index 9594bc5745ed..1e723807ab4c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi @@ -52,6 +52,11 @@ / { /* these are used by bootloader for disabling nodes */ aliases { + ethernet0 = &fec; + ethernet1 = &lan1; + ethernet2 = &lan2; + ethernet3 = &lan3; + ethernet4 = &lan4; led0 = &led0; led1 = &led1; led2 = &led2; @@ -212,28 +217,61 @@ compatible = "marvell,mv88e6085"; reg = <0>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + + sw_phy0: ethernet-phy@0 { + reg = <0x0>; + }; + + sw_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + sw_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + sw_phy3: ethernet-phy@3 { + reg = <0x3>; + }; + }; + ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + lan4: port@0 { reg = <0>; label = "lan4"; + phy-handle = <&sw_phy0>; + phy-mode = "internal"; + local-mac-address = [00 00 00 00 00 00]; }; - port@1 { + lan3: port@1 { reg = <1>; label = "lan3"; + phy-handle = <&sw_phy1>; + phy-mode = "internal"; + local-mac-address = [00 00 00 00 00 00]; }; - port@2 { + lan2: port@2 { reg = <2>; label = "lan2"; + phy-handle = <&sw_phy2>; + phy-mode = "internal"; + local-mac-address = [00 00 00 00 00 00]; }; - port@3 { + lan1: port@3 { reg = <3>; label = "lan1"; + phy-handle = <&sw_phy3>; + phy-mode = "internal"; + local-mac-address = [00 00 00 00 00 00]; }; port@5 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi index 218d6e667ed2..424dc7fcd533 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5910.dtsi @@ -326,7 +326,6 @@ st,drdy-int-pin = <1>; interrupt-parent = <&gpio7>; interrupts = <13 0>; - interrupt-names = "INT1"; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi index de5983cf7810..49ea25c71967 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5912.dtsi @@ -307,7 +307,6 @@ st,drdy-int-pin = <1>; interrupt-parent = <&gpio7>; interrupts = <13 0>; - interrupt-names = "INT1"; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi index da0f8dae1ea8..4d2abcd44eff 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi @@ -500,21 +500,21 @@ pinctrl_pwm1: pwm1grp { fsl,pins = < - /* 100 k PD, DSE 120 OHM, SPPEED LO */ + /* 100 k PD, DSE 120 OHM, SPEED LO */ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x00003050 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < - /* 100 k PD, DSE 120 OHM, SPPEED LO */ + /* 100 k PD, DSE 120 OHM, SPEED LO */ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x00003050 >; }; pinctrl_pwm4: pwm4grp { fsl,pins = < - /* 100 k PD, DSE 120 OHM, SPPEED LO */ + /* 100 k PD, DSE 120 OHM, SPEED LO */ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x00003050 >; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi index 763831dc0e24..32a110a35b02 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-nitrogen6_max.dtsi @@ -15,7 +15,7 @@ reg = <0x10000000 0xF0000000>; }; - reg_1p8v: regulator@0 { + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "1P8V"; regulator-min-microvolt = <1800000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu-revc.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu-revc.dtsi index b81799d7076a..596b3bb3ddd1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu-revc.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu-revc.dtsi @@ -25,7 +25,7 @@ compatible = "ti,tsc2046e-adc"; reg = <0>; pinctrl-0 = <&pinctrl_touch>; - pinctrl-names ="default"; + pinctrl-names = "default"; spi-max-frequency = <1000000>; interrupts-extended = <&gpio3 19 IRQ_TYPE_LEVEL_LOW>; #io-channel-cells = <1>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi new file mode 100644 index 000000000000..a1ea33c4eeb7 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-var-som.dtsi @@ -0,0 +1,569 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Support for Variscite VAR-SOM-MX6 Module + * + * Copyright 2011 Linaro Ltd. + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright (C) 2014-2016 Variscite, Ltd. + * Author: Donio Ron <ron.d@variscite.com> + * Copyright 2022 Bootlin + */ + +/dts-v1/; + +#include "imx6q.dtsi" +#include <dt-bindings/clock/imx6qdl-clock.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/sound/fsl-imx-audmux.h> + +/ { + model = "Variscite VAR-SOM-MX6 module"; + compatible = "variscite,var-som-imx6q", "fsl,imx6q"; + + chosen { + stdout-path = &uart1; + }; + + memory@10000000 { + device_type = "memory"; + reg = <0x10000000 0x40000000>; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb_h1_vbus: regulator-usb-h1-vbud { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_wl18xx_vmmc: regulator-wl18xx { + compatible = "regulator-fixed"; + regulator-name = "vwl1807"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <70000>; + }; + + sound: sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "var-som-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound_codec>; + simple-audio-card,frame-master = <&sound_codec>; + simple-audio-card,widgets = "Headphone", "Headphone Jack", + "Line", "Line In", "Microphone", "Mic Jack"; + simple-audio-card,routing = "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "LINE1L", "Line In", + "LINE1R", "Line In"; + + sound_cpu: simple-audio-card,cpu { + sound-dai = <&ssi2>; + }; + + sound_codec: simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + clocks = <&clks IMX6QDL_CLK_CKO>; + }; + }; + + rfkill { + compatible = "rfkill-gpio"; + name = "rfkill"; + radio-type = "bluetooth"; + shutdown-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; + + mux-ssi2 { + fsl,audmux-port = <1>; + fsl,port-config = < + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSDIR | + IMX_AUDMUX_V2_PTCR_TFSEL(2) | + IMX_AUDMUX_V2_PTCR_TCLKDIR | + IMX_AUDMUX_V2_PTCR_TCSEL(2)) + IMX_AUDMUX_V2_PDCR_RXDSEL(2) + >; + }; + + mux-aud3 { + fsl,audmux-port = <2>; + fsl,port-config = < + IMX_AUDMUX_V2_PTCR_SYN + IMX_AUDMUX_V2_PDCR_RXDSEL(1) + >; + }; +}; + +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-handle = <&rgmii_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy: ethernet-phy@7 { + reg = <7>; + reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + }; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pmic@8 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + tlv320aic3106: audio-codec@1b { + compatible = "ti,tlv320aic3106"; + reg = <0x1b>; + #sound-dai-cells = <0>; + DRVDD-supply = <®_3p3v>; + AVDD-supply = <®_3p3v>; + IOVDD-supply = <®_3p3v>; + DVDD-supply = <®_1p8v>; + ai3x-ocmv = <0>; + reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; + ai3x-gpio-func = < + 0 /* AIC3X_GPIO1_FUNC_DISABLED */ + 5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */ + >; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + /* Audio Clock */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 + >; + }; + + pinctrl_bt: btgrp { + fsl,pins = < + /* Bluetooth/wifi enable */ + MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1 + /* Wifi Slow Clock */ + MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + >; + }; + + pinctrl_enet_irq: enetirqgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* CTW6120 IRQ */ + MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0xb0b1 + /* SDMMC2 CD/WP */ + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + /* PMIC INT */ + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17069 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10069 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17069 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17069 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17069 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17069 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x13059 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhzgrp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130B9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130B9 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhzgrp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 + /* WL_EN */ + MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x130F9 + /* WL_IRQ */ + MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130F9 + >; + }; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +®_arm { + vin-supply = <&sw1a_reg>; +}; + +®_pu { + vin-supply = <&sw1c_reg>; +}; + +®_soc { + vin-supply = <&sw1c_reg>; +}; + +®_vdd1p1 { + vin-supply = <&vgen5_reg>; +}; + +®_vdd2p5 { + vin-supply = <&vgen5_reg>; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&ssi2 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>; + uart-has-rtscts; + status = "okay"; +}; + +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg_var>; + disable-over-current; + dr_mode = "host"; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <0x5>; +}; + +&usbphy2 { + fsl,tx-d-cal = <0x5>; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + non-removable; + keep-power-in-suspend; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <4>; + vmmc-supply = <®_wl18xx_vmmc>; + non-removable; + wakeup-source; + keep-power-in-suspend; + cap-power-off-card; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + wifi: wifi@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio6>; + interrupts = <17 IRQ_TYPE_EDGE_RISING>; + ref-clock-frequency = <38400000>; + }; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi index bda182edc589..81142c523fa8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -475,7 +475,7 @@ <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; - fsl,asrc-rate = <48000>; + fsl,asrc-rate = <48000>; fsl,asrc-width = <16>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index f6b35923ad83..df3a375f0a3e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -418,7 +418,7 @@ <&sdma 21 23 1>, <&sdma 22 23 1>; dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; - fsl,asrc-rate = <48000>; + fsl,asrc-rate = <48000>; fsl,asrc-width = <16>; status = "okay"; }; @@ -1010,7 +1010,7 @@ clock-names = "ipg", "ahb", "per"; bus-width = <4>; fsl,tuning-start-tap = <20>; - fsl,tuning-step= <2>; + fsl,tuning-step = <2>; status = "disabled"; }; @@ -1024,7 +1024,7 @@ clock-names = "ipg", "ahb", "per"; bus-width = <4>; fsl,tuning-start-tap = <20>; - fsl,tuning-step= <2>; + fsl,tuning-step = <2>; status = "disabled"; }; @@ -1038,7 +1038,7 @@ clock-names = "ipg", "ahb", "per"; bus-width = <4>; fsl,tuning-start-tap = <20>; - fsl,tuning-step= <2>; + fsl,tuning-step = <2>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi index 4ffe99ed55ca..07dcecbe485d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi @@ -121,6 +121,8 @@ max-speed = <100>; interrupt-parent = <&gpio5>; interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; }; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi index 6bd90473050b..1db146ac1c17 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi @@ -114,10 +114,8 @@ #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c_gpio>; - gpios = < - &gpio5 1 GPIO_ACTIVE_HIGH /* SDA */ - &gpio5 0 GPIO_ACTIVE_HIGH /* SCL */ - >; + sda-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; clock-frequency = <400000>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 3b87d980e9f4..a27a7554c2e7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -364,7 +364,7 @@ <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; dma-names = "rxa", "rxb", "rxc", "txa", "txb", "txc"; - fsl,asrc-rate = <48000>; + fsl,asrc-rate = <48000>; fsl,asrc-width = <16>; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-aster.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-aster.dts index 919c0464d6cb..b2cdf4877718 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-aster.dts @@ -12,6 +12,5 @@ model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Aster"; compatible = "toradex,colibri-imx6ull-emmc-aster", "toradex,colibri-imx6ull-emmc", - "toradex,colibri-imx6ull", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-eval-v3.dts index 61b93cb040c7..2dc16c54fc78 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-eval-v3.dts @@ -12,6 +12,5 @@ model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Evaluation Board V3"; compatible = "toradex,colibri-imx6ull-emmc-eval", "toradex,colibri-imx6ull-emmc", - "toradex,colibri-imx6ull", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris-v2.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris-v2.dts index b9060c2f7977..9bae08fb7f85 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris-v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris-v2.dts @@ -10,8 +10,7 @@ / { model = "Toradex Colibri iMX6ULL 1G (eMMC) on Colibri Iris V2"; - compatible = "toradex,colibri-imx6ull-iris-v2", + compatible = "toradex,colibri-imx6ull-emmc-iris-v2", "toradex,colibri-imx6ull-emmc", - "toradex,colibri-imx6ull", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris.dts index 0ab71f2f5daa..0b1603ff9420 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-emmc-iris.dts @@ -12,6 +12,5 @@ model = "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Iris"; compatible = "toradex,colibri-imx6ull-emmc-iris", "toradex,colibri-imx6ull-emmc", - "toradex,colibri-imx6ull", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-eval-v3.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-eval-v3.dts index d6da984e518d..c5bc255b21e1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-eval-v3.dts @@ -10,7 +10,7 @@ / { model = "Toradex Colibri iMX6ULL 256/512MB on Colibri Evaluation Board V3"; - compatible = "toradex,colibri-imx6ull-eval", "fsl,imx6ull"; + compatible = "toradex,colibri-imx6ull-eval", "toradex,colibri-imx6ull", "fsl,imx6ull"; }; &ad7879_ts { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-aster.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-aster.dts index c7da5b41966f..d3bbd05da293 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-aster.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-aster.dts @@ -11,7 +11,7 @@ / { model = "Toradex Colibri iMX6ULL 512MB on Colibri Aster"; compatible = "toradex,colibri-imx6ull-wifi-aster", - "toradex,colibri-imx6ull", + "toradex,colibri-imx6ull-wifi", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-eval-v3.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-eval-v3.dts index 917f5dbe64ba..0ac306c9cef2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-eval-v3.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-eval-v3.dts @@ -10,7 +10,7 @@ / { model = "Toradex Colibri iMX6ULL 512MB on Colibri Evaluation Board V3"; - compatible = "toradex,colibri-imx6ull-wifi-eval", "fsl,imx6ull"; + compatible = "toradex,colibri-imx6ull-wifi-eval", "toradex,colibri-imx6ull-wifi", "fsl,imx6ull"; }; &ad7879_ts { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris-v2.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris-v2.dts index 488da6df56fa..38cd52c45496 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris-v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris-v2.dts @@ -11,7 +11,7 @@ / { model = "Toradex Colibri iMX6ULL 512MB on Colibri Iris V2"; compatible = "toradex,colibri-imx6ull-wifi-iris-v2", - "toradex,colibri-imx6ull", + "toradex,colibri-imx6ull-wifi", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris.dts index e63253254754..5f60df64f173 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri-wifi-iris.dts @@ -11,7 +11,7 @@ / { model = "Toradex Colibri iMX6ULL 512MB on Colibri Iris"; compatible = "toradex,colibri-imx6ull-wifi-iris", - "toradex,colibri-imx6ull", + "toradex,colibri-imx6ull-wifi", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-emmc.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-emmc.dts index 14adb87da911..1610f3892d9e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-emmc.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-emmc.dts @@ -9,8 +9,8 @@ / { model = "PHYTEC phyGate-Tauri i.MX6 UltraLite"; - compatible = "phytec,imx6ull-phygate-tauri", - "phytec,imx6ull-phygate-tauri-emmc", + compatible = "phytec,imx6ull-phygate-tauri-emmc", + "phytec,imx6ull-phygate-tauri", "phytec,imx6ull-pcl063", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-nand.dts b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-nand.dts index ae396ac63443..92e7d38d5637 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-nand.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri-nand.dts @@ -9,8 +9,8 @@ / { model = "PHYTEC phyGate-Tauri i.MX6 UltraLite"; - compatible = "phytec,imx6ull-phygate-tauri", - "phytec,imx6ull-phygate-tauri-nand", + compatible = "phytec,imx6ull-phygate-tauri-nand", + "phytec,imx6ull-phygate-tauri", "phytec,imx6ull-pcl063", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi index ea627638e40c..d12fb44aeb14 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi @@ -9,11 +9,6 @@ #include "imx6ull-phytec-phycore-som.dtsi" / { - - model = "PHYTEC phyGate-Tauri i.MX6 UltraLite"; - compatible = "phytec,imx6ull-phygate-tauri", - "phytec,imx6ull-pcl063", "fsl,imx6ull"; - aliases { rtc0 = &i2c_rtc; rtc1 = &snvs_rtc; @@ -121,7 +116,7 @@ tpm_tis: tpm@1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tpm>; - compatible = "tcg,tpm_tis-spi"; + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; reg = <1>; spi-max-frequency = <20000000>; interrupt-parent = <&gpio5>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index fe42b0a46831..3fc3130f9def 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -128,11 +128,16 @@ }; }; - /* NXP SE97BTP with temperature sensor + eeprom */ + /* LM75A temperature sensor, TQMa7x 01xx */ + lm75a: temperature-sensor@48 { + compatible = "national,lm75a"; + reg = <0x48>; + }; + + /* NXP SE97BTP with temperature sensor + eeprom, TQMa7x 02xx */ se97b: temperature-sensor-eeprom@1e { compatible = "nxp,se97b", "jedec,jc-42.4-temp"; reg = <0x1e>; - status = "okay"; }; /* ST M24C64 */ diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-aster.dts b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-aster.dts index d9c7045a55ba..212e0685585d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-aster.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-aster.dts @@ -12,7 +12,6 @@ model = "Toradex Colibri iMX7D 1GB (eMMC) on Aster Carrier Board"; compatible = "toradex,colibri-imx7d-emmc-aster", "toradex,colibri-imx7d-emmc", - "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-eval-v3.dts b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-eval-v3.dts index 96b599439dde..1deece7e7129 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-eval-v3.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-eval-v3.dts @@ -11,7 +11,6 @@ model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3"; compatible = "toradex,colibri-imx7d-emmc-eval-v3", "toradex,colibri-imx7d-emmc", - "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris-v2.dts b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris-v2.dts index 5eccb837b158..22e7863c2e80 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris-v2.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris-v2.dts @@ -11,7 +11,6 @@ model = "Toradex Colibri iMX7D 1GB on Iris V2 Carrier Board"; compatible = "toradex,colibri-imx7d-emmc-iris-v2", "toradex,colibri-imx7d-emmc", - "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris.dts b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris.dts index ae10e8a66ff1..a3cf8f50e3dc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc-iris.dts @@ -11,7 +11,6 @@ model = "Toradex Colibri iMX7D 1GB on Iris Carrier Board"; compatible = "toradex,colibri-imx7d-emmc-iris", "toradex,colibri-imx7d-emmc", - "toradex,colibri-imx7d", "fsl,imx7d"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc.dtsi index 3740e34ef99f..9670f45eab3b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc.dtsi @@ -11,6 +11,10 @@ /* Required to properly pass MAC addresses from bootloader. */ ethernet0 = &fec1; ethernet1 = &fec2; + mmc0 = &usdhc3; /* eMMC */ + mmc1 = &usdhc1; /* MMC/SD slot */ + /delete-property/ mmc2; + /delete-property/ mmc3; }; memory@80000000 { diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts b/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts index 3a723843d562..9984b343cdf0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts @@ -130,7 +130,7 @@ * TCG specification - Section 6.4.1 Clocking: * TPM shall support a SPI clock frequency range of 10-24 MHz. */ - st33htph: tpm-tis@0 { + st33htph: tpm@0 { compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; reg = <0>; spi-max-frequency = <24000000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-meerkat96.dts b/arch/arm/boot/dts/nxp/imx/imx7d-meerkat96.dts index dd8003bd1fc0..f0fda15f3020 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-meerkat96.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-meerkat96.dts @@ -212,7 +212,7 @@ keep-power-in-suspend; wakeup-source; vmmc-supply = <®_wlreg_on>; - vqmmc-supply =<®_3p3v>; + vqmmc-supply = <®_3p3v>; status = "okay"; brcmf: wifi@1 { diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-pico-pi.dts b/arch/arm/boot/dts/nxp/imx/imx7d-pico-pi.dts index f263e391e24c..62221131336f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-pico-pi.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-pico-pi.dts @@ -61,6 +61,10 @@ }; }; +&usdhc1 { + status = "disabled"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi index c5eefe89cd99..8d5037ac03c7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi @@ -108,6 +108,14 @@ assigned-clock-rates = <0>, <32768>; }; +&cpu0 { + cpu-supply = <&sw1a_reg>; +}; + +&cpu1 { + cpu-supply = <&sw1a_reg>; +}; + &ecspi3 { cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-smegw01.dts b/arch/arm/boot/dts/nxp/imx/imx7d-smegw01.dts index 85b97b5f64e7..7ed27c7ad726 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-smegw01.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-smegw01.dts @@ -149,7 +149,7 @@ &i2c2 { pinctrl-names = "default"; - pinctrl-0 =<&pinctrl_i2c2>; + pinctrl-0 = <&pinctrl_i2c2>; clock-frequency = <100000>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi index 4b94b8afb55d..0484e349e064 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7d.dtsi @@ -217,9 +217,6 @@ }; &ca_funnel_in_ports { - #address-cells = <1>; - #size-cells = <0>; - port@1 { reg = <1>; ca_funnel_in_port1: endpoint { diff --git a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi index e152d08f27d4..ebf7befcc11e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7s.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7s.dtsi @@ -183,6 +183,15 @@ interrupt-parent = <&gpc>; ranges; + ocram: sram@900000 { + compatible = "mmio-sram"; + reg = <0x00900000 0x20000>; + ranges = <0 0x00900000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&clks IMX7D_OCRAM_CLK>; + }; + funnel@30041000 { compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; reg = <0x30041000 0x1000>; @@ -190,7 +199,11 @@ clock-names = "apb_pclk"; ca_funnel_in_ports: in-ports { - port { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; ca_funnel_in_port0: endpoint { remote-endpoint = <&etm0_out_port>; }; @@ -454,7 +467,7 @@ }; gpt1: timer@302d0000 { - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; reg = <0x302d0000 0x10000>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_GPT1_ROOT_CLK>, @@ -463,7 +476,7 @@ }; gpt2: timer@302e0000 { - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; reg = <0x302e0000 0x10000>; interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_GPT2_ROOT_CLK>, @@ -473,7 +486,7 @@ }; gpt3: timer@302f0000 { - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; reg = <0x302f0000 0x10000>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_GPT3_ROOT_CLK>, @@ -483,7 +496,7 @@ }; gpt4: timer@30300000 { - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; reg = <0x30300000 0x10000>; interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_GPT4_ROOT_CLK>, @@ -605,6 +618,7 @@ nvmem-cells = <&tempmon_calib>, <&fuse_grade>; nvmem-cell-names = "calib", "temp_grade"; clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>; + #thermal-sensor-cells = <0>; }; }; @@ -658,7 +672,6 @@ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <3>; interrupt-parent = <&intc>; - #power-domain-cells = <1>; pgc { #address-cells = <1>; @@ -721,6 +734,8 @@ clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>, <&clks IMX7D_ECSPI4_ROOT_CLK>; clock-names = "ipg", "per"; + dma-names = "rx", "tx"; + dmas = <&sdma 6 7 1>, <&sdma 7 7 2>; status = "disabled"; }; @@ -800,10 +815,8 @@ compatible = "fsl,imx7-csi"; reg = <0x30710000 0x10000>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7D_CLK_DUMMY>, - <&clks IMX7D_CSI_MCLK_ROOT_CLK>, - <&clks IMX7D_CLK_DUMMY>; - clock-names = "axi", "mclk", "dcic"; + clocks = <&clks IMX7D_CSI_MCLK_ROOT_CLK>; + clock-names = "mclk"; status = "disabled"; port { @@ -814,13 +827,23 @@ }; lcdif: lcdif@30730000 { - compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif"; + compatible = "fsl,imx7d-lcdif", "fsl,imx6sx-lcdif"; reg = <0x30730000 0x10000>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>, <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>; clock-names = "pix", "axi"; status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + lcdif_out_mipi_dsi: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_dsi_in_lcdif>; + }; + }; }; mipi_csi: mipi-csi@30750000 { @@ -853,6 +876,42 @@ }; }; }; + + mipi_dsi: dsi@30760000 { + compatible = "fsl,imx7d-mipi-dsim", "fsl,imx8mm-mipi-dsim"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30760000 0x400>; + clocks = <&clks IMX7D_MIPI_DSI_ROOT_CLK>, + <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; + clock-names = "bus_clk", "sclk_mipi"; + assigned-clocks = <&clks IMX7D_MIPI_DSI_ROOT_SRC>, + <&clks IMX7D_PLL_SYS_PFD5_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_PFD5_CLK>; + assigned-clock-rates = <0>, <333000000>; + power-domains = <&pgc_mipi_phy>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + samsung,burst-clock-frequency = <891000000>; + samsung,esc-clock-frequency = <20000000>; + samsung,pll-clock-frequency = <24000000>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_dsi_in_lcdif: endpoint@0 { + reg = <0>; + remote-endpoint = <&lcdif_out_mipi_dsi>; + }; + }; + }; + }; }; aips3: bus@30800000 { @@ -878,6 +937,8 @@ clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>, <&clks IMX7D_ECSPI1_ROOT_CLK>; clock-names = "ipg", "per"; + dma-names = "rx", "tx"; + dmas = <&sdma 0 7 1>, <&sdma 1 7 2>; status = "disabled"; }; @@ -890,6 +951,8 @@ clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>, <&clks IMX7D_ECSPI2_ROOT_CLK>; clock-names = "ipg", "per"; + dma-names = "rx", "tx"; + dmas = <&sdma 2 7 1>, <&sdma 3 7 2>; status = "disabled"; }; @@ -902,6 +965,8 @@ clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>, <&clks IMX7D_ECSPI3_ROOT_CLK>; clock-names = "ipg", "per"; + dma-names = "rx", "tx"; + dmas = <&sdma 4 7 1>, <&sdma 5 7 2>; status = "disabled"; }; @@ -1278,7 +1343,7 @@ gpmi: nand-controller@33002000 { compatible = "fsl,imx7d-gpmi-nand"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; reg = <0x33002000 0x2000>, <0x33004000 0x4000>; reg-names = "gpmi-nand", "bch"; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi index b01ddda7bd9e..ac338320ac1d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi @@ -209,7 +209,7 @@ }; usbphy1: usb-phy@40350000 { - compatible = "fsl,imx7ulp-usbphy", "fsl,imx6ul-usbphy"; + compatible = "fsl,imx7ulp-usbphy"; reg = <0x40350000 0x1000>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; clocks = <&pcc2 IMX7ULP_CLK_USB_PHY>; diff --git a/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi b/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi index ebf97fcdd8ea..e78d0a7d8cd2 100644 --- a/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi @@ -35,22 +35,25 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_buttons>; - button1 { + button-1 { label = "s14"; linux,code = <KEY_1>; gpios = <&expander_in0 0 GPIO_ACTIVE_LOW>; + wakeup-source; }; - button2 { + button-2 { label = "s6"; linux,code = <KEY_2>; gpios = <&expander_in0 1 GPIO_ACTIVE_LOW>; + wakeup-source; }; - button3 { + button-3 { label = "s7"; linux,code = <KEY_3>; gpios = <&expander_in0 2 GPIO_ACTIVE_LOW>; + wakeup-source; }; power-button { @@ -464,7 +467,7 @@ pinctrl_pwm2: pwm2grp { fsl,pins = < - /* 100 k PD, DSE 120 OHM, SPPEED LO */ + /* 100 k PD, DSE 120 OHM, SPEED LO */ MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x00003050 >; }; diff --git a/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi index 9cf09c183b85..6dd73290f0c6 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi @@ -74,7 +74,7 @@ sct_pwm: pwm@40000000 { compatible = "nxp,lpc1850-sct-pwm"; reg = <0x40000000 0x1000>; - clocks =<&ccu1 CLK_CPU_SCT>; + clocks = <&ccu1 CLK_CPU_SCT>; clock-names = "pwm"; resets = <&rgu 37>; #pwm-cells = <3>; diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi b/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi index 49c78c84cd5d..d471cc5efa94 100644 --- a/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi +++ b/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi @@ -112,7 +112,7 @@ compatible = "fsl,ls1021a-msi"; reg = <0x0 0x1570e00 0x0 0x8>; msi-controller; - interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; }; msi2: msi-controller@1570e08 { diff --git a/arch/arm/boot/dts/nxp/mxs/imx23-evk.dts b/arch/arm/boot/dts/nxp/mxs/imx23-evk.dts index 3b609d987d88..7365fe4581a3 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx23-evk.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx23-evk.dts @@ -137,7 +137,7 @@ backlight_display: backlight { compatible = "pwm-backlight"; - pwms = <&pwm 2 5000000>; + pwms = <&pwm 2 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts b/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts index 46057d9bf555..b23e7ada9c80 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts @@ -166,7 +166,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 2 5000000>; + pwms = <&pwm 2 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; @@ -175,10 +175,8 @@ #address-cells = <1>; #size-cells = <0>; compatible = "i2c-gpio"; - gpios = < - &gpio1 24 0 /* SDA */ - &gpio1 22 0 /* SCL */ - >; + sda-gpios = <&gpio1 24 0>; + scl-gpios = <&gpio1 22 0>; i2c-gpio,delay-us = <2>; /* ~100 kHz */ }; @@ -186,10 +184,8 @@ #address-cells = <1>; #size-cells = <0>; compatible = "i2c-gpio"; - gpios = < - &gpio0 31 0 /* SDA */ - &gpio0 30 0 /* SCL */ - >; + sda-gpios = <&gpio0 31 0>; + scl-gpios = <&gpio0 30 0>; i2c-gpio,delay-us = <2>; /* ~100 kHz */ touch: touch@20 { diff --git a/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts b/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts index b1d8210f3ecc..28341d8315c2 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx23-xfi3.dts @@ -153,7 +153,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 2 5000000>; + pwms = <&pwm 2 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx23.dtsi b/arch/arm/boot/dts/nxp/mxs/imx23.dtsi index 5eca942a52fd..0309592af1e1 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx23.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx23.dtsi @@ -110,7 +110,7 @@ reg = <0x80018000 0x2000>; gpio0: gpio@0 { - compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx23-gpio"; reg = <0>; interrupts = <16>; gpio-controller; @@ -120,7 +120,7 @@ }; gpio1: gpio@1 { - compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx23-gpio"; reg = <1>; interrupts = <17>; gpio-controller; @@ -130,7 +130,7 @@ }; gpio2: gpio@2 { - compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx23-gpio"; reg = <2>; interrupts = <18>; gpio-controller; @@ -412,7 +412,7 @@ status = "disabled"; }; - dma_apbx: dma-apbx@80024000 { + dma_apbx: dma-controller@80024000 { compatible = "fsl,imx23-dma-apbx"; reg = <0x80024000 0x2000>; interrupts = <7>, <5>, <9>, <26>, @@ -484,7 +484,7 @@ ranges; clks: clkctrl@80040000 { - compatible = "fsl,imx23-clkctrl", "fsl,clkctrl"; + compatible = "fsl,imx23-clkctrl"; reg = <0x80040000 0x2000>; #clock-cells = <1>; }; @@ -561,7 +561,7 @@ compatible = "fsl,imx23-pwm"; reg = <0x80064000 0x2000>; clocks = <&clks 30>; - #pwm-cells = <2>; + #pwm-cells = <3>; fsl,pwm-number = <5>; status = "disabled"; }; @@ -598,7 +598,7 @@ reg = <0x80070000 0x2000>; interrupts = <0>; clocks = <&clks 32>, <&clks 16>; - clock-names = "uart", "apb_pclk"; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts b/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts index fd6fee63ad2f..6c87266eb135 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-apf28dev.dts @@ -39,7 +39,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 3 191000>; + pwms = <&pwm 3 191000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts index 953e3162d2d2..f0ce897b9d5c 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10049.dts @@ -173,7 +173,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 3 5000000>; + pwms = <&pwm 3 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10055.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10055.dts index 70e225a99fbe..cb68edd6101b 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10055.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10055.dts @@ -39,7 +39,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 3 5000000>; + pwms = <&pwm 3 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts index 0be7356941ee..5875c3d7ba97 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10057.dts @@ -26,7 +26,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 4 5000000>; + pwms = <&pwm 4 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <7>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts index aae0f1801461..b414e67ef379 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-cfa10058.dts @@ -26,7 +26,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 3 5000000>; + pwms = <&pwm 3 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi index 6633cde305e5..652fc9e57a55 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx28-eukrea-mbmx28lc.dtsi @@ -14,7 +14,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 4 1000000>; + pwms = <&pwm 4 1000000 0>; brightness-levels = <0 25 50 75 100 125 150 175 200 225 255>; default-brightness-level = <10>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts b/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts index 783abb82b2a8..9ebb7371e235 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts @@ -117,7 +117,7 @@ backlight_display: backlight { compatible = "pwm-backlight"; - pwms = <&pwm 2 5000000>; + pwms = <&pwm 2 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-lwe.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28-lwe.dtsi index bb971e660db8..69fcb0dde940 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-lwe.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx28-lwe.dtsi @@ -18,6 +18,7 @@ memory@40000000 { reg = <0x40000000 0x08000000>; + device_type = "memory"; }; reg_3v3: regulator-reg-3v3 { diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts b/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts index 8241c2d159fa..34b4d3246db1 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-m28cu3.dts @@ -17,7 +17,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 3 5000000>; + pwms = <&pwm 3 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts b/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts index 6bf26f386a5e..13070ca08cff 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-m28evk.dts @@ -13,7 +13,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 4 5000000>; + pwms = <&pwm 4 5000000 0>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts b/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts index 23ad7cd0a1de..5485fe118dc4 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts @@ -131,7 +131,7 @@ backlight { compatible = "pwm-backlight"; - pwms = <&pwm 0 500000>; + pwms = <&pwm 0 500000 0>; /* * a silly way to create a 1:1 relationship between the * PWM value and the actual duty cycle @@ -260,6 +260,7 @@ sgtl5000: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + #sound-dai-cells = <0>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; clocks = <&mclk>; @@ -652,6 +653,7 @@ vbus-supply = <®_usb0_vbus>; disable-over-current; dr_mode = "peripheral"; + phy_type = "utmi"; status = "okay"; }; @@ -659,19 +661,18 @@ vbus-supply = <®_usb1_vbus>; disable-over-current; dr_mode = "host"; + phy_type = "utmi"; status = "okay"; }; &usbphy0 { pinctrl-names = "default"; pinctrl-0 = <&tx28_usbphy0_pins>; - phy_type = "utmi"; status = "okay"; }; &usbphy1 { pinctrl-names = "default"; pinctrl-0 = <&tx28_usbphy1_pins>; - phy_type = "utmi"; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts index a400c108f66a..6c5e6856648a 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-xea.dts @@ -8,6 +8,7 @@ #include "imx28-lwe.dtsi" / { + model = "Liebherr XEA board"; compatible = "lwn,imx28-xea", "fsl,imx28"; }; diff --git a/arch/arm/boot/dts/nxp/mxs/imx28.dtsi b/arch/arm/boot/dts/nxp/mxs/imx28.dtsi index 763adeb995ee..4817fba2d938 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28.dtsi +++ b/arch/arm/boot/dts/nxp/mxs/imx28.dtsi @@ -164,7 +164,7 @@ reg = <0x80018000 0x2000>; gpio0: gpio@0 { - compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx28-gpio"; reg = <0>; interrupts = <127>; gpio-controller; @@ -174,7 +174,7 @@ }; gpio1: gpio@1 { - compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx28-gpio"; reg = <1>; interrupts = <126>; gpio-controller; @@ -184,7 +184,7 @@ }; gpio2: gpio@2 { - compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx28-gpio"; reg = <2>; interrupts = <125>; gpio-controller; @@ -194,7 +194,7 @@ }; gpio3: gpio@3 { - compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx28-gpio"; reg = <3>; interrupts = <124>; gpio-controller; @@ -204,7 +204,7 @@ }; gpio4: gpio@4 { - compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; + compatible = "fsl,imx28-gpio"; reg = <4>; interrupts = <123>; gpio-controller; @@ -990,7 +990,7 @@ status = "disabled"; }; - dma_apbx: dma-apbx@80024000 { + dma_apbx: dma-controller@80024000 { compatible = "fsl,imx28-dma-apbx"; reg = <0x80024000 0x2000>; interrupts = <78>, <79>, <66>, <0>, @@ -1003,7 +1003,7 @@ }; dcp: crypto@80028000 { - compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; + compatible = "fsl,imx28-dcp"; reg = <0x80028000 0x2000>; interrupts = <52>, <53>, <54>; status = "okay"; @@ -1100,7 +1100,7 @@ ranges; clks: clkctrl@80040000 { - compatible = "fsl,imx28-clkctrl", "fsl,clkctrl"; + compatible = "fsl,imx28-clkctrl"; reg = <0x80040000 0x2000>; #clock-cells = <1>; }; @@ -1185,7 +1185,7 @@ compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; reg = <0x80064000 0x2000>; clocks = <&clks 44>; - #pwm-cells = <2>; + #pwm-cells = <3>; fsl,pwm-number = <8>; status = "disabled"; }; @@ -1252,7 +1252,7 @@ reg = <0x80074000 0x1000>; interrupts = <47>; clocks = <&clks 45>, <&clks 26>; - clock-names = "uart", "apb_pclk"; + clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi index 14c411f146f5..5a19da9313ae 100644 --- a/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi @@ -55,7 +55,7 @@ brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; power-supply = <®_3v3>; - status = "okay"; + status = "okay"; }; &dcu0 { diff --git a/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts b/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts index e4f691d601cc..722182f5fd17 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-bk4.dts @@ -68,7 +68,7 @@ #address-cells = <1>; #size-cells = <0>; /* PTD12 ->RPIO[91] */ - sck-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; + sck-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; /* PTD10 ->RPIO[89] */ miso-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; num-chipselects = <0>; @@ -79,7 +79,7 @@ gpio-controller; #gpio-cells = <2>; /* PTB18 -> RGPIO[40] */ - load-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + load-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; spi-max-frequency = <100000>; }; }; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts index 1a19aec8957b..7e72f860c3c5 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts @@ -162,7 +162,7 @@ suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6085"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_switch>; @@ -173,26 +173,26 @@ interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; label = "eth_cu_1000_1"; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_2"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_1000_3"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_fc_1000_1"; phy-mode = "1000base-x"; @@ -200,7 +200,7 @@ sfp = <&sff>; }; - port@6 { + ethernet-port@6 { reg = <6>; phy-mode = "rmii"; ethernet = <&fec1>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts index 16b4e06c4efa..b0ed68af0546 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts @@ -294,11 +294,11 @@ pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; - sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; mosi-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; miso-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; - cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW - &gpio1 8 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW + &gpio1 8 GPIO_ACTIVE_HIGH>; num-chipselects = <2>; flash@0 { diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts index df1335492a19..77492eeea450 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts @@ -47,17 +47,17 @@ #address-cells = <1>; #size-cells = <0>; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 0>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -68,37 +68,37 @@ }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "aib2main_1"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "aib2main_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_1000_5"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_cu_1000_6"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_4"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_7"; }; - port@7 { + ethernet-port@7 { reg = <7>; label = "modem_pic"; @@ -108,7 +108,7 @@ }; }; - switch0port10: port@10 { + switch0port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "xgmii"; @@ -130,32 +130,32 @@ #address-cells = <1>; #size-cells = <0>; - switch1: switch1@0 { + switch1: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 1>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_3"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_100_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_100_3"; }; - switch1port9: port@9 { + switch1port9: ethernet-port@9 { reg = <9>; label = "dsa"; phy-mode = "xgmii"; @@ -168,7 +168,7 @@ }; }; - switch1port10: port@10 { + switch1port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "xgmii"; @@ -188,17 +188,17 @@ #address-cells = <1>; #size-cells = <0>; - switch2: switch2@0 { + switch2: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 2>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_fc_1000_2"; phy-mode = "1000base-x"; @@ -206,7 +206,7 @@ sfp = <&sff1>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_fc_1000_3"; phy-mode = "1000base-x"; @@ -214,7 +214,7 @@ sfp = <&sff2>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_fc_1000_4"; phy-mode = "1000base-x"; @@ -222,7 +222,7 @@ sfp = <&sff3>; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_fc_1000_5"; phy-mode = "1000base-x"; @@ -230,7 +230,7 @@ sfp = <&sff4>; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_fc_1000_6"; phy-mode = "1000base-x"; @@ -238,7 +238,7 @@ sfp = <&sff5>; }; - port@7 { + ethernet-port@7 { reg = <7>; label = "eth_fc_1000_7"; phy-mode = "1000base-x"; @@ -246,7 +246,7 @@ sfp = <&sff6>; }; - port@9 { + ethernet-port@9 { reg = <9>; label = "eth_fc_1000_1"; phy-mode = "1000base-x"; @@ -254,7 +254,7 @@ sfp = <&sff0>; }; - switch2port10: port@10 { + switch2port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "2500base-x"; @@ -276,17 +276,17 @@ #address-cells = <1>; #size-cells = <0>; - switch3: switch3@0 { + switch3: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 3>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_fc_1000_8"; phy-mode = "1000base-x"; @@ -294,7 +294,7 @@ sfp = <&sff7>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_fc_1000_9"; phy-mode = "1000base-x"; @@ -302,7 +302,7 @@ sfp = <&sff8>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_fc_1000_10"; phy-mode = "1000base-x"; @@ -310,7 +310,7 @@ sfp = <&sff9>; }; - switch3port9: port@9 { + switch3port9: ethernet-port@9 { reg = <9>; label = "dsa"; phy-mode = "2500base-x"; @@ -322,7 +322,7 @@ }; }; - switch3port10: port@10 { + switch3port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "xgmii"; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts index 1461804ecaea..2a490464660c 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts @@ -123,7 +123,7 @@ suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -134,11 +134,11 @@ interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -149,32 +149,32 @@ }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_1"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_1000_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_1000_3"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_cu_1000_4"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_5"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_6"; }; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts index 463c2452b9b7..078d8699e16d 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts @@ -112,7 +112,7 @@ suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -123,11 +123,11 @@ interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -138,27 +138,27 @@ }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_100_3"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_4"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_5"; }; - port@8 { + ethernet-port@8 { reg = <8>; label = "eth_cu_1000_1"; }; - port@9 { + ethernet-port@9 { reg = <9>; label = "eth_cu_1000_2"; phy-handle = <&phy9>; @@ -167,12 +167,12 @@ }; }; - mdio1 { + mdio-external { compatible = "marvell,mv88e6xxx-mdio-external"; #address-cells = <1>; #size-cells = <0>; - phy9: phy9@0 { + phy9: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; pinctrl-0 = <&pinctrl_gpio_phy9>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts index f5ae0d5de315..22c8f44390a9 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts @@ -137,7 +137,7 @@ suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -148,11 +148,11 @@ interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -163,32 +163,32 @@ }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_1"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_1000_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_1000_3"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_cu_1000_4"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_5"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_6"; }; diff --git a/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi b/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi index d1095b700c56..acccf9a3c898 100644 --- a/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi +++ b/arch/arm/boot/dts/nxp/vf/vfxxx.dtsi @@ -111,8 +111,7 @@ interrupts = <61 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_UART0>; clock-names = "ipg"; - dmas = <&edma0 0 2>, - <&edma0 0 3>; + dmas = <&edma0 0 2>, <&edma0 0 3>; dma-names = "rx","tx"; status = "disabled"; }; @@ -123,8 +122,7 @@ interrupts = <62 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_UART1>; clock-names = "ipg"; - dmas = <&edma0 0 4>, - <&edma0 0 5>; + dmas = <&edma0 0 4>, <&edma0 0 5>; dma-names = "rx","tx"; status = "disabled"; }; @@ -135,8 +133,7 @@ interrupts = <63 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_UART2>; clock-names = "ipg"; - dmas = <&edma0 0 6>, - <&edma0 0 7>; + dmas = <&edma0 0 6>, <&edma0 0 7>; dma-names = "rx","tx"; status = "disabled"; }; @@ -147,8 +144,7 @@ interrupts = <64 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_UART3>; clock-names = "ipg"; - dmas = <&edma0 0 8>, - <&edma0 0 9>; + dmas = <&edma0 0 8>, <&edma0 0 9>; dma-names = "rx","tx"; status = "disabled"; }; @@ -162,8 +158,7 @@ clocks = <&clks VF610_CLK_DSPI0>; clock-names = "dspi"; spi-num-chipselects = <6>; - dmas = <&edma1 1 12>, - <&edma1 1 13>; + dmas = <&edma1 1 12>, <&edma1 1 13>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -177,8 +172,7 @@ clocks = <&clks VF610_CLK_DSPI1>; clock-names = "dspi"; spi-num-chipselects = <4>; - dmas = <&edma1 1 14>, - <&edma1 1 15>; + dmas = <&edma1 1 14>, <&edma1 1 15>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -426,8 +420,7 @@ interrupts = <72 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_I2C1>; clock-names = "ipg"; - dmas = <&edma0 0 52>, - <&edma0 0 53>; + dmas = <&edma0 0 52>, <&edma0 0 53>; dma-names = "rx","tx"; status = "disabled"; }; @@ -551,8 +544,7 @@ clocks = <&clks VF610_CLK_DSPI3>; clock-names = "dspi"; spi-num-chipselects = <2>; - dmas = <&edma1 0 12>, - <&edma1 0 13>; + dmas = <&edma1 0 12>, <&edma1 0 13>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -719,8 +711,7 @@ interrupts = <74 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks VF610_CLK_I2C3>; clock-names = "ipg"; - dmas = <&edma0 1 38>, - <&edma0 1 39>; + dmas = <&edma0 1 38>, <&edma0 1 39>; dma-names = "rx","tx"; status = "disabled"; }; |