diff options
| -rw-r--r-- | drivers/mtd/spi-nor/spansion.c | 60 |
1 files changed, 39 insertions, 21 deletions
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index 5e021e20497b..91bc0aace516 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -139,21 +139,7 @@ static int cypress_nor_octal_dtr_dis(struct spi_nor *nor) return 0; } -/** - * cypress_nor_quad_enable_volatile() - enable Quad I/O mode in volatile - * register. - * @nor: pointer to a 'struct spi_nor' - * - * It is recommended to update volatile registers in the field application due - * to a risk of the non-volatile registers corruption by power interrupt. This - * function sets Quad Enable bit in CFR1 volatile. If users set the Quad Enable - * bit in the CFR1 non-volatile in advance (typically by a Flash programmer - * before mounting Flash on PCB), the Quad Enable bit in the CFR1 volatile is - * also set during Flash power-up. - * - * Return: 0 on success, -errno otherwise. - */ -static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) +static int cypress_nor_quad_enable_volatile_reg(struct spi_nor *nor, u64 addr) { struct spi_mem_op op; u8 addr_mode_nbytes = nor->params->addr_mode_nbytes; @@ -161,8 +147,7 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) int ret; op = (struct spi_mem_op) - CYPRESS_NOR_RD_ANY_REG_OP(addr_mode_nbytes, - SPINOR_REG_CYPRESS_CFR1V, 0, + CYPRESS_NOR_RD_ANY_REG_OP(addr_mode_nbytes, addr, 0, nor->bouncebuf); ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto); @@ -175,8 +160,7 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) /* Update the Quad Enable bit. */ nor->bouncebuf[0] |= SPINOR_REG_CYPRESS_CFR1_QUAD_EN; op = (struct spi_mem_op) - CYPRESS_NOR_WR_ANY_REG_OP(addr_mode_nbytes, - SPINOR_REG_CYPRESS_CFR1V, 1, + CYPRESS_NOR_WR_ANY_REG_OP(addr_mode_nbytes, addr, 1, nor->bouncebuf); ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto); if (ret) @@ -186,8 +170,7 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) /* Read back and check it. */ op = (struct spi_mem_op) - CYPRESS_NOR_RD_ANY_REG_OP(addr_mode_nbytes, - SPINOR_REG_CYPRESS_CFR1V, 0, + CYPRESS_NOR_RD_ANY_REG_OP(addr_mode_nbytes, addr, 0, nor->bouncebuf); ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto); if (ret) @@ -202,6 +185,41 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) } /** + * cypress_nor_quad_enable_volatile() - enable Quad I/O mode in volatile + * register. + * @nor: pointer to a 'struct spi_nor' + * + * It is recommended to update volatile registers in the field application due + * to a risk of the non-volatile registers corruption by power interrupt. This + * function sets Quad Enable bit in CFR1 volatile. If users set the Quad Enable + * bit in the CFR1 non-volatile in advance (typically by a Flash programmer + * before mounting Flash on PCB), the Quad Enable bit in the CFR1 volatile is + * also set during Flash power-up. + * + * Return: 0 on success, -errno otherwise. + */ +static int cypress_nor_quad_enable_volatile(struct spi_nor *nor) +{ + struct spi_nor_flash_parameter *params = nor->params; + u64 addr; + u8 i; + int ret; + + if (!params->n_dice) + return cypress_nor_quad_enable_volatile_reg(nor, + SPINOR_REG_CYPRESS_CFR1V); + + for (i = 0; i < params->n_dice; i++) { + addr = params->vreg_offset[i] + SPINOR_REG_CYPRESS_CFR1; + ret = cypress_nor_quad_enable_volatile_reg(nor, addr); + if (ret) + return ret; + } + + return 0; +} + +/** * cypress_nor_determine_addr_mode_by_sr1() - Determine current address mode * (3 or 4-byte) by querying status * register 1 (SR1). |