diff options
-rw-r--r-- | arch/mips/Kconfig | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/war.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 6fee1a133e9d..eaf7519e3033 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2825,7 +2825,7 @@ config SMP Y to "Enhanced Real Time Clock Support", below. See also the SMP-HOWTO available at - <http://www.tldp.org/docs.html#howto>. + <https://www.tldp.org/docs.html#howto>. If you don't know what to do here, say N. diff --git a/arch/mips/include/asm/war.h b/arch/mips/include/asm/war.h index 1eedd596a064..e43f800e662d 100644 --- a/arch/mips/include/asm/war.h +++ b/arch/mips/include/asm/war.h @@ -121,7 +121,7 @@ * operate correctly if the internal data cache refill buffer is empty. These * CACHE instructions should be separated from any potential data cache miss * by a load instruction to an uncached address to empty the response buffer." - * (Revision 2.0 device errata from IDT available on http://www.idt.com/ + * (Revision 2.0 device errata from IDT available on https://www.idt.com/ * in .pdf format.) */ #ifndef R4600_V2_HIT_CACHEOP_WAR |