diff options
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 1 |
2 files changed, 0 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 186d6cadba84..4760ecb6ae06 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4815,9 +4815,6 @@ static void intel_pre_plane_update(struct intel_crtc *crtc) if (atomic->update_fbc) intel_fbc_pre_update(crtc); - if (crtc->atomic.disable_ips) - hsw_disable_ips(crtc); - if (atomic->pre_disable_primary) intel_pre_disable_primary(&crtc->base); @@ -11889,18 +11886,6 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state, intel_crtc->atomic.post_enable_primary = turn_on; intel_crtc->atomic.update_fbc = true; - if (turn_off) { - /* - * FIXME: Actually if we will still have any other - * plane enabled on the pipe we could let IPS enabled - * still, but for now lets consider that when we make - * primary invisible by setting DSPCNTR to 0 on - * update_primary_plane function IPS needs to be - * disable. - */ - intel_crtc->atomic.disable_ips = true; - } - /* * BDW signals flip done immediately if the plane * is disabled, even if the plane enable is already diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1251a7ae4a6a..5fd3e13936e4 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -544,7 +544,6 @@ struct intel_mmio_flip { */ struct intel_crtc_atomic_commit { /* Sleepable operations to perform before commit */ - bool disable_ips; bool pre_disable_primary; /* Sleepable operations to perform after commit */ |