diff options
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0b9c33a000f9..a0e826a740b1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -6165,6 +6165,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); struct intel_dp *intel_dp = &dig_port->dp; + u8 dpcd[DP_RECEIVER_CAP_SIZE]; if (dig_port->base.type == INTEL_OUTPUT_EDP && (long_hpd || !intel_pps_have_panel_power_or_vdd(intel_dp))) { @@ -6187,6 +6188,17 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd) dig_port->base.base.name, long_hpd ? "long" : "short"); + /* + * TBT DP tunnels require the GFX driver to read out the DPRX caps in + * response to long HPD pulses. The DP hotplug handler does that, + * however the hotplug handler may be blocked by another + * connector's/encoder's hotplug handler. Since the TBT CM may not + * complete the DP tunnel BW request for the latter connector/encoder + * waiting for this encoder's DPRX read, perform a dummy read here. + */ + if (long_hpd) + intel_dp_read_dprx_caps(intel_dp, dpcd); + if (long_hpd) { intel_dp->reset_link_params = true; return IRQ_NONE; |