diff options
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts index 675abb70aa18..750a5255b57c 100644 --- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts @@ -53,6 +53,26 @@ }; }; +&lpi2c7 { + clock-frequency = <1000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c7>; + status = "okay"; + + i2c7_pcal6524: i2c7-gpio@22 { + compatible = "nxp,pcal6524"; + reg = <0x22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c7_pcal6524>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpio5>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + }; +}; + &lpuart1 { /* console */ pinctrl-names = "default"; @@ -95,6 +115,19 @@ }; &scmi_iomuxc { + pinctrl_i2c7_pcal6524: i2c7pcal6524grp { + fsl,pins = < + IMX95_PAD_GPIO_IO36__GPIO5_IO_BIT16 0x31e + >; + }; + + pinctrl_lpi2c7: lpi2c7grp { + fsl,pins = < + IMX95_PAD_GPIO_IO08__LPI2C7_SDA 0x40000b9e + IMX95_PAD_GPIO_IO09__LPI2C7_SCL 0x40000b9e + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX 0x31e |