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-rw-r--r--arch/arm/boot/dts/am335x-sancloud-bbe.dts2
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi67
-rw-r--r--arch/arm/boot/dts/am4372.dtsi140
-rw-r--r--arch/arm/boot/dts/am437x-gp-evm.dts2
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts2
-rw-r--r--arch/arm/boot/dts/dra7-l4.dtsi34
-rw-r--r--arch/arm/boot/dts/dra7.dtsi255
-rw-r--r--arch/arm/boot/dts/dra74x.dtsi71
-rw-r--r--arch/arm/boot/dts/omap2.dtsi42
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts5
-rw-r--r--arch/arm/boot/dts/omap3.dtsi45
-rw-r--r--arch/arm/boot/dts/omap36xx.dtsi4
-rw-r--r--arch/arm/boot/dts/omap4-l4.dtsi13
-rw-r--r--arch/arm/boot/dts/omap4.dtsi43
-rw-r--r--arch/arm/boot/dts/omap5-l4.dtsi13
-rw-r--r--arch/arm/boot/dts/omap5.dtsi40
-rw-r--r--arch/arm/configs/omap2plus_defconfig4
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c6
-rw-r--r--drivers/bus/ti-sysc.c17
-rw-r--r--include/linux/platform_data/ti-sysc.h1
21 files changed, 621 insertions, 189 deletions
diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe.dts b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
index 8678e6e35493..e5fdb7abb0d5 100644
--- a/arch/arm/boot/dts/am335x-sancloud-bbe.dts
+++ b/arch/arm/boot/dts/am335x-sancloud-bbe.dts
@@ -108,7 +108,7 @@
&cpsw_emac0 {
phy-handle = <&ethphy0>;
- phy-mode = "rgmii-txid";
+ phy-mode = "rgmii-id";
};
&i2c0 {
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 646f11430dad..7db9f72a03d5 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -439,23 +439,64 @@
status = "disabled";
};
- sham: sham@53100000 {
- compatible = "ti,omap4-sham";
+ sham_target: target-module@53100000 {
+ compatible = "ti,sysc-omap3-sham", "ti,sysc";
ti,hwmods = "sham";
- reg = <0x53100000 0x200>;
- interrupts = <109>;
- dmas = <&edma 36 0>;
- dma-names = "rx";
+ reg = <0x53100100 0x4>,
+ <0x53100110 0x4>,
+ <0x53100114 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x53100000 0x1000>;
+
+ sham: sham@0 {
+ compatible = "ti,omap4-sham";
+ reg = <0 0x200>;
+ interrupts = <109>;
+ dmas = <&edma 36 0>;
+ dma-names = "rx";
+ };
};
- aes: aes@53500000 {
- compatible = "ti,omap4-aes";
+ aes_target: target-module@53500000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "aes";
- reg = <0x53500000 0xa0>;
- interrupts = <103>;
- dmas = <&edma 6 0>,
- <&edma 5 0>;
- dma-names = "tx", "rx";
+ reg = <0x53500080 0x4>,
+ <0x53500084 0x4>,
+ <0x53500088 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x53500000 0x1000>;
+
+ aes: aes@0 {
+ compatible = "ti,omap4-aes";
+ reg = <0 0xa0>;
+ interrupts = <103>;
+ dmas = <&edma 6 0>,
+ <&edma 5 0>;
+ dma-names = "tx", "rx";
+ };
};
};
};
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index ca0aa3f26c0a..79a14b0ce43b 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -256,33 +256,95 @@
};
};
- sham: sham@53100000 {
- compatible = "ti,omap5-sham";
+ sham_target: target-module@53100000 {
+ compatible = "ti,sysc-omap3-sham", "ti,sysc";
ti,hwmods = "sham";
- reg = <0x53100000 0x300>;
- dmas = <&edma 36 0>;
- dma-names = "rx";
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x53100100 0x4>,
+ <0x53100110 0x4>,
+ <0x53100114 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM4_L3_SHAM_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x53100000 0x1000>;
+
+ sham: sham@0 {
+ compatible = "ti,omap5-sham";
+ reg = <0 0x300>;
+ dmas = <&edma 36 0>;
+ dma-names = "rx";
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
- aes: aes@53501000 {
- compatible = "ti,omap4-aes";
+ aes_target: target-module@53501000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "aes";
- reg = <0x53501000 0xa0>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma 6 0>,
- <&edma 5 0>;
- dma-names = "tx", "rx";
+ reg = <0x53501080 0x4>,
+ <0x53501084 0x4>,
+ <0x53501088 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM4_L3_AES_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x53501000 0x1000>;
+
+ aes: aes@0 {
+ compatible = "ti,omap4-aes";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma 6 0>,
+ <&edma 5 0>;
+ dma-names = "tx", "rx";
+ };
};
- des: des@53701000 {
- compatible = "ti,omap4-des";
+ des_target: target-module@53701000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "des";
- reg = <0x53701000 0xa0>;
- interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma 34 0>,
- <&edma 33 0>;
- dma-names = "tx", "rx";
+ reg = <0x53701030 0x4>,
+ <0x53701034 0x4>,
+ <0x53701038 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l3_clkdm */
+ clocks = <&l3_clkctrl AM4_L3_DES_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x53701000 0x1000>;
+
+ des: des@0 {
+ compatible = "ti,omap4-des";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma 34 0>,
+ <&edma 33 0>;
+ dma-names = "tx", "rx";
+ };
};
gpmc: gpmc@50000000 {
@@ -305,17 +367,35 @@
status = "disabled";
};
- qspi: spi@47900000 {
- compatible = "ti,am4372-qspi";
- reg = <0x47900000 0x100>,
- <0x30000000 0x4000000>;
- reg-names = "qspi_base", "qspi_mmap";
- #address-cells = <1>;
- #size-cells = <0>;
+ target-module@47900000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
ti,hwmods = "qspi";
- interrupts = <0 138 0x4>;
- num-cs = <4>;
- status = "disabled";
+ reg = <0x47900000 0x4>,
+ <0x47900010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ clocks = <&l3s_clkctrl AM4_L3S_QSPI_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x47900000 0x1000>,
+ <0x30000000 0x30000000 0x4000000>;
+
+ qspi: spi@0 {
+ compatible = "ti,am4372-qspi";
+ reg = <0 0x100>,
+ <0x30000000 0x4000000>;
+ reg-names = "qspi_base", "qspi_mmap";
+ clocks = <&dpll_per_m2_div4_ck>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0 138 0x4>;
+ num-cs = <4>;
+ };
};
dss: dss@4832a000 {
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index cae4500194fe..811c8cae315b 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -86,7 +86,7 @@
};
lcd0: display {
- compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
+ compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
label = "lcd";
backlight = <&lcd_bl>;
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 95314121d111..078cb473fa7d 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -42,7 +42,7 @@
};
lcd0: display {
- compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
+ compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
label = "lcd";
backlight = <&lcd_bl>;
diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
index 7e7aa101d8a4..89d441686d35 100644
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -212,7 +212,7 @@
ranges = <0x0 0x56000 0x1000>;
sdma: dma-controller@0 {
- compatible = "ti,omap4430-sdma";
+ compatible = "ti,omap4430-sdma", "ti,omap-sdma";
reg = <0x0 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
@@ -2044,6 +2044,38 @@
<0x00001000 0x000a5000 0x00001000>;
};
+ des_target: target-module@a5000 { /* 0x480a5000 */
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ ti,hwmods = "des";
+ reg = <0xa5030 0x4>,
+ <0xa5034 0x4>,
+ <0xa5038 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+ clocks = <&l4sec_clkctrl DRA7_L4SEC_DES_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xa5000 0x00001000>;
+
+ des: des@0 {
+ compatible = "ti,omap4-des";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&sdma_xbar 117>, <&sdma_xbar 116>;
+ dma-names = "tx", "rx";
+ clocks = <&l3_iclk_div>;
+ clock-names = "fck";
+ };
+ };
+
target-module@a8000 { /* 0x480a8000, ap 59 1a.0 */
compatible = "ti,sysc";
status = "disabled";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 73e5011f531a..005fc7fb7806 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -377,44 +377,120 @@
ti,hwmods = "dmm";
};
- mmu0_dsp1: mmu@40d01000 {
- compatible = "ti,dra7-dsp-iommu";
- reg = <0x40d01000 0x100>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu0_dsp1";
- #iommu-cells = <0>;
- ti,syscon-mmuconfig = <&dsp1_system 0x0>;
- status = "disabled";
+ target-module@40d01000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x40d01000 0x4>,
+ <0x40d01010 0x4>,
+ <0x40d01014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_dsp1 1>;
+ reset-names = "rstctrl";
+ ranges = <0x0 0x40d01000 0x1000>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+
+ mmu0_dsp1: mmu@0 {
+ compatible = "ti,dra7-dsp-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,syscon-mmuconfig = <&dsp1_system 0x0>;
+ };
};
- mmu1_dsp1: mmu@40d02000 {
- compatible = "ti,dra7-dsp-iommu";
- reg = <0x40d02000 0x100>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu1_dsp1";
- #iommu-cells = <0>;
- ti,syscon-mmuconfig = <&dsp1_system 0x1>;
- status = "disabled";
+ target-module@40d02000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x40d02000 0x4>,
+ <0x40d02010 0x4>,
+ <0x40d02014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_dsp1 1>;
+ reset-names = "rstctrl";
+ ranges = <0x0 0x40d02000 0x1000>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+
+ mmu1_dsp1: mmu@0 {
+ compatible = "ti,dra7-dsp-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,syscon-mmuconfig = <&dsp1_system 0x1>;
+ };
};
- mmu_ipu1: mmu@58882000 {
- compatible = "ti,dra7-iommu";
- reg = <0x58882000 0x100>;
- interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu_ipu1";
- #iommu-cells = <0>;
- ti,iommu-bus-err-back;
- status = "disabled";
+ target-module@58882000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x58882000 0x4>,
+ <0x58882010 0x4>,
+ <0x58882014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ clocks = <&ipu1_clkctrl DRA7_IPU1_MMU_IPU1_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_ipu 2>;
+ reset-names = "rstctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x58882000 0x100>;
+
+ mmu_ipu1: mmu@0 {
+ compatible = "ti,dra7-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,iommu-bus-err-back;
+ };
};
- mmu_ipu2: mmu@55082000 {
- compatible = "ti,dra7-iommu";
- reg = <0x55082000 0x100>;
- interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu_ipu2";
- #iommu-cells = <0>;
- ti,iommu-bus-err-back;
- status = "disabled";
+ target-module@55082000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x55082000 0x4>,
+ <0x55082010 0x4>,
+ <0x55082014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ clocks = <&ipu2_clkctrl DRA7_IPU2_MMU_IPU2_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_core 2>;
+ reset-names = "rstctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x55082000 0x100>;
+
+ mmu_ipu2: mmu@0 {
+ compatible = "ti,dra7-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,iommu-bus-err-back;
+ };
};
abb_mpu: regulator-abb-mpu {
@@ -652,48 +728,99 @@
};
};
- aes1: aes@4b500000 {
- compatible = "ti,omap4-aes";
+ aes1_target: target-module@4b500000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "aes1";
- reg = <0x4b500000 0xa0>;
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma_xbar 111 0>, <&edma_xbar 110 0>;
- dma-names = "tx", "rx";
- clocks = <&l3_iclk_div>;
+ reg = <0x4b500080 0x4>,
+ <0x4b500084 0x4>,
+ <0x4b500088 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l4sec_clkdm */
+ clocks = <&l4sec_clkctrl DRA7_L4SEC_AES1_CLKCTRL 0>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4b500000 0x1000>;
+
+ aes1: aes@0 {
+ compatible = "ti,omap4-aes";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma_xbar 111 0>, <&edma_xbar 110 0>;
+ dma-names = "tx", "rx";
+ clocks = <&l3_iclk_div>;
+ clock-names = "fck";
+ };
};
- aes2: aes@4b700000 {
- compatible = "ti,omap4-aes";
+ aes2_target: target-module@4b700000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "aes2";
- reg = <0x4b700000 0xa0>;
- interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma_xbar 114 0>, <&edma_xbar 113 0>;
- dma-names = "tx", "rx";
- clocks = <&l3_iclk_div>;
- clock-names = "fck";
- };
-
- des: des@480a5000 {
- compatible = "ti,omap4-des";
- ti,hwmods = "des";
- reg = <0x480a5000 0xa0>;
- interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&sdma_xbar 117>, <&sdma_xbar 116>;
- dma-names = "tx", "rx";
- clocks = <&l3_iclk_div>;
+ reg = <0x4b700080 0x4>,
+ <0x4b700084 0x4>,
+ <0x4b700088 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): per_pwrdm, l4sec_clkdm */
+ clocks = <&l4sec_clkctrl DRA7_L4SEC_AES2_CLKCTRL 0>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4b700000 0x1000>;
+
+ aes2: aes@0 {
+ compatible = "ti,omap4-aes";
+ reg = <0 0xa0>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma_xbar 114 0>, <&edma_xbar 113 0>;
+ dma-names = "tx", "rx";
+ clocks = <&l3_iclk_div>;
+ clock-names = "fck";
+ };
};
- sham: sham@53100000 {
- compatible = "ti,omap5-sham";
+ sham_target: target-module@4b101000 {
+ compatible = "ti,sysc-omap3-sham", "ti,sysc";
ti,hwmods = "sham";
- reg = <0x4b101000 0x300>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma_xbar 119 0>;
- dma-names = "rx";
- clocks = <&l3_iclk_div>;
+ reg = <0x4b101100 0x4>,
+ <0x4b101110 0x4>,
+ <0x4b101114 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
+ clocks = <&l4sec_clkctrl DRA7_L4SEC_SHAM_CLKCTRL 0>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4b101000 0x1000>;
+
+ sham: sham@0 {
+ compatible = "ti,omap5-sham";
+ reg = <0 0x300>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma_xbar 119 0>;
+ dma-names = "rx";
+ clocks = <&l3_iclk_div>;
+ clock-names = "fck";
+ };
};
opp_supply_mpu: opp-supply@4a003b20 {
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index d1b5b76bc5a8..c5abc436ca1f 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -66,24 +66,63 @@
};
};
- mmu0_dsp2: mmu@41501000 {
- compatible = "ti,dra7-dsp-iommu";
- reg = <0x41501000 0x100>;
- interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu0_dsp2";
- #iommu-cells = <0>;
- ti,syscon-mmuconfig = <&dsp2_system 0x0>;
- status = "disabled";
+ target-module@41501000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x41501000 0x4>,
+ <0x41501010 0x4>,
+ <0x41501014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_dsp2 1>;
+ reset-names = "rstctrl";
+ ranges = <0x0 0x41501000 0x1000>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+
+ mmu0_dsp2: mmu@0 {
+ compatible = "ti,dra7-dsp-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,syscon-mmuconfig = <&dsp2_system 0x0>;
+ };
};
- mmu1_dsp2: mmu@41502000 {
- compatible = "ti,dra7-dsp-iommu";
- reg = <0x41502000 0x100>;
- interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu1_dsp2";
- #iommu-cells = <0>;
- ti,syscon-mmuconfig = <&dsp2_system 0x1>;
- status = "disabled";
+ target-module@41502000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x41502000 0x4>,
+ <0x41502010 0x4>,
+ <0x41502014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+
+ clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_dsp2 1>;
+ reset-names = "rstctrl";
+ ranges = <0x0 0x41502000 0x1000>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+
+ mmu1_dsp2: mmu@0 {
+ compatible = "ti,dra7-dsp-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,syscon-mmuconfig = <&dsp2_system 0x1>;
+ };
};
};
};
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 000bf16de651..6b1552d8c011 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -8,6 +8,7 @@
* kind, whether express or implied.
*/
+#include <dt-bindings/bus/ti-sysc.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/omap.h>
@@ -79,17 +80,38 @@
reg = <0x480FE000 0x1000>;
};
- sdma: dma-controller@48056000 {
- compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
+ target-module@48056000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "dma";
- reg = <0x48056000 0x1000>;
- interrupts = <12>,
- <13>,
- <14>,
- <15>;
- #dma-cells = <1>;
- dma-channels = <32>;
- dma-requests = <64>;
+ reg = <0x48056000 0x4>,
+ <0x4805602c 0x4>,
+ <0x48056028 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&core_l3_ck>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x48056000 0x1000>;
+
+ sdma: dma-controller@0 {
+ compatible = "ti,omap2420-sdma", "ti,omap-sdma";
+ reg = <0 0x1000>;
+ interrupts = <12>,
+ <13>,
+ <14>,
+ <15>;
+ #dma-cells = <1>;
+ dma-channels = <32>;
+ dma-requests = <64>;
+ };
};
i2c1: i2c@48070000 {
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 7f57af2f10ac..15ef7593be12 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -309,6 +309,10 @@
};
};
+&sdma {
+ compatible = "ti,omap2430-sdma", "ti,omap-sdma";
+};
+
&i2c1 {
compatible = "ti,omap2430-i2c";
};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index a638e059135b..c3c6d7d04a76 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -482,6 +482,11 @@
regulator-always-on;
};
+/* First two dma channels are reserved on secure omap3 */
+&sdma {
+ dma-channel-mask = <0xfffffffc>;
+};
+
&twl {
twl_audio: audio {
compatible = "ti,twl4030-audio";
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 5698a3e241aa..06d9108a8385 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -206,17 +206,42 @@
reg = <0x48200000 0x1000>;
};
- sdma: dma-controller@48056000 {
- compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
- reg = <0x48056000 0x1000>;
- interrupts = <12>,
- <13>,
- <14>,
- <15>;
- #dma-cells = <1>;
- dma-channels = <32>;
- dma-requests = <96>;
+ target-module@48056000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
ti,hwmods = "dma";
+ reg = <0x48056000 0x4>,
+ <0x4805602c 0x4>,
+ <0x48056028 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ /* Domains (V, P, C): core, core_pwrdm, core_l3_clkdm */
+ clocks = <&core_l3_ick>;
+ clock-names = "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x48056000 0x1000>;
+
+ sdma: dma-controller@0 {
+ compatible = "ti,omap3430-sdma", "ti,omap-sdma";
+ reg = <0x0 0x1000>;
+ interrupts = <12>,
+ <13>,
+ <14>,
+ <15>;
+ #dma-cells = <1>;
+ dma-channels = <32>;
+ dma-requests = <96>;
+ };
};
gpio1: gpio@48310000 {
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
index c618cb257d00..71f3c8f1f924 100644
--- a/arch/arm/boot/dts/omap36xx.dtsi
+++ b/arch/arm/boot/dts/omap36xx.dtsi
@@ -223,6 +223,10 @@
};
};
+&sdma {
+ compatible = "ti,omap3630-sdma", "ti,omap-sdma";
+};
+
/* OMAP3630 needs dss_96m_fck for VENC */
&venc {
clocks = <&dss_tv_fck>, <&dss_96m_fck>;
diff --git a/arch/arm/boot/dts/omap4-l4.dtsi b/arch/arm/boot/dts/omap4-l4.dtsi
index 83f803be8ee2..8f2dbb73b2b5 100644
--- a/arch/arm/boot/dts/omap4-l4.dtsi
+++ b/arch/arm/boot/dts/omap4-l4.dtsi
@@ -160,7 +160,7 @@
ranges = <0x0 0x56000 0x1000>;
sdma: dma-controller@0 {
- compatible = "ti,omap4430-sdma";
+ compatible = "ti,omap4430-sdma", "ti,omap-sdma";
reg = <0x0 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
@@ -321,7 +321,6 @@
target-module@66000 { /* 0x4a066000, ap 25 26.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
- ti,hwmods = "mmu_dsp";
reg = <0x66000 0x4>,
<0x66010 0x4>,
<0x66014 0x4>;
@@ -335,12 +334,18 @@
/* Domains (V, P, C): iva, tesla_pwrdm, tesla_clkdm */
clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
clock-names = "fck";
+ resets = <&prm_tesla 1>;
+ reset-names = "rstctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x66000 0x1000>;
- /* mmu_dsp cannot be moved before reset driver */
- status = "disabled";
+ mmu_dsp: mmu@0 {
+ compatible = "ti,omap4-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ };
};
};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 2de8a6b53de9..af901fc6e909 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -173,14 +173,6 @@
#gpio-cells = <2>;
};
- mmu_dsp: mmu@4a066000 {
- compatible = "ti,omap4-iommu";
- reg = <0x4a066000 0x100>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu_dsp";
- #iommu-cells = <0>;
- };
-
target-module@52000000 {
compatible = "ti,sysc-omap4", "ti,sysc";
ti,hwmods = "iss";
@@ -206,14 +198,35 @@
/* No child device binding, driver in staging */
};
- mmu_ipu: mmu@55082000 {
- compatible = "ti,omap4-iommu";
- reg = <0x55082000 0x100>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu_ipu";
- #iommu-cells = <0>;
- ti,iommu-bus-err-back;
+ target-module@55082000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x55082000 0x4>,
+ <0x55082010 0x4>,
+ <0x55082014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ clocks = <&ducati_clkctrl OMAP4_IPU_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_core 2>;
+ reset-names = "rstctrl";
+ ranges = <0x0 0x55082000 0x100>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+
+ mmu_ipu: mmu@0 {
+ compatible = "ti,omap4-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,iommu-bus-err-back;
+ };
};
+
target-module@4012c000 {
compatible = "ti,sysc-omap4", "ti,sysc";
ti,hwmods = "slimbus1";
diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi
index 25aacf1ba708..cedcb65f1a6f 100644
--- a/arch/arm/boot/dts/omap5-l4.dtsi
+++ b/arch/arm/boot/dts/omap5-l4.dtsi
@@ -237,7 +237,7 @@
ranges = <0x0 0x56000 0x1000>;
sdma: dma-controller@0 {
- compatible = "ti,omap4430-sdma";
+ compatible = "ti,omap4430-sdma", "ti,omap-sdma";
reg = <0x0 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
@@ -349,7 +349,6 @@
target-module@66000 { /* 0x4a066000, ap 23 0a.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
- ti,hwmods = "mmu_dsp";
reg = <0x66000 0x4>,
<0x66010 0x4>,
<0x66014 0x4>;
@@ -364,12 +363,18 @@
/* Domains (V, P, C): mm, dsp_pwrdm, dsp_clkdm */
clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>;
clock-names = "fck";
+ resets = <&prm_dsp 1>;
+ reset-names = "rstctrl";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x66000 0x1000>;
- /* mmu_dsp cannot be moved before reset driver */
- status = "disabled";
+ mmu_dsp: mmu@0 {
+ compatible = "ti,omap4-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ };
};
target-module@70000 { /* 0x4a070000, ap 79 2e.0 */
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 1f6ad1debc90..d0ecf54d5a23 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -186,21 +186,33 @@
#gpio-cells = <2>;
};
- mmu_dsp: mmu@4a066000 {
- compatible = "ti,omap4-iommu";
- reg = <0x4a066000 0x100>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu_dsp";
- #iommu-cells = <0>;
- };
+ target-module@55082000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x55082000 0x4>,
+ <0x55082010 0x4>,
+ <0x55082014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
+ clock-names = "fck";
+ resets = <&prm_core 2>;
+ reset-names = "rstctrl";
+ ranges = <0x0 0x55082000 0x100>;
+ #size-cells = <1>;
+ #address-cells = <1>;
- mmu_ipu: mmu@55082000 {
- compatible = "ti,omap4-iommu";
- reg = <0x55082000 0x100>;
- interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
- ti,hwmods = "mmu_ipu";
- #iommu-cells = <0>;
- ti,iommu-bus-err-back;
+ mmu_ipu: mmu@0 {
+ compatible = "ti,omap4-iommu";
+ reg = <0x0 0x100>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ ti,iommu-bus-err-back;
+ };
};
dmm@4e000000 {
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 8c37cc8ab6f2..c32c338f7704 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -92,6 +92,7 @@ CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
CONFIG_NETFILTER=y
CONFIG_PHONET=m
+CONFIG_NET_SWITCHDEV=y
CONFIG_CAN=m
CONFIG_CAN_C_CAN=m
CONFIG_CAN_C_CAN_PLATFORM=m
@@ -181,6 +182,7 @@ CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_TI_DAVINCI_EMAC=y
CONFIG_TI_CPSW=y
+CONFIG_TI_CPSW_SWITCHDEV=y
CONFIG_TI_CPTS=y
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
@@ -554,6 +556,6 @@ CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_SPLIT=y
CONFIG_DEBUG_INFO_DWARF4=y
CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
CONFIG_SCHEDSTATS=y
# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_TI_CPSW_SWITCHDEV=y
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index ca52271de5a8..e95c224ffc4d 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -306,10 +306,14 @@ static void __init dra7x_evm_mmc_quirk(void)
static struct clockdomain *ti_sysc_find_one_clockdomain(struct clk *clk)
{
+ struct clk_hw *hw = __clk_get_hw(clk);
struct clockdomain *clkdm = NULL;
struct clk_hw_omap *hwclk;
- hwclk = to_clk_hw_omap(__clk_get_hw(clk));
+ hwclk = to_clk_hw_omap(hw);
+ if (!omap2_clk_is_hw_omap(hw))
+ return NULL;
+
if (hwclk && hwclk->clkdm_name)
clkdm = clkdm_lookup(hwclk->clkdm_name);
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index 56887c6877a7..ccb44fe790a7 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -343,6 +343,12 @@ static int sysc_get_clocks(struct sysc *ddata)
return -EINVAL;
}
+ /* Always add a slot for main clocks fck and ick even if unused */
+ if (!nr_fck)
+ ddata->nr_clocks++;
+ if (!nr_ick)
+ ddata->nr_clocks++;
+
ddata->clocks = devm_kcalloc(ddata->dev,
ddata->nr_clocks, sizeof(*ddata->clocks),
GFP_KERNEL);
@@ -421,7 +427,7 @@ static int sysc_enable_opt_clocks(struct sysc *ddata)
struct clk *clock;
int i, error;
- if (!ddata->clocks)
+ if (!ddata->clocks || ddata->nr_clocks < SYSC_OPTFCK0 + 1)
return 0;
for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
@@ -455,7 +461,7 @@ static void sysc_disable_opt_clocks(struct sysc *ddata)
struct clk *clock;
int i;
- if (!ddata->clocks)
+ if (!ddata->clocks || ddata->nr_clocks < SYSC_OPTFCK0 + 1)
return;
for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
@@ -981,7 +987,8 @@ static int sysc_disable_module(struct device *dev)
return ret;
}
- if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
+ if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_MSTANDBY) ||
+ ddata->cfg.quirks & (SYSC_QUIRK_FORCE_MSTANDBY))
best_mode = SYSC_IDLE_FORCE;
reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
@@ -1583,6 +1590,10 @@ static int sysc_reset(struct sysc *ddata)
sysc_val |= sysc_mask;
sysc_write(ddata, sysc_offset, sysc_val);
+ if (ddata->cfg.srst_udelay)
+ usleep_range(ddata->cfg.srst_udelay,
+ ddata->cfg.srst_udelay * 2);
+
if (ddata->clk_enable_quirk)
ddata->clk_enable_quirk(ddata);
diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h
index 0b9380475144..8cfe570fdece 100644
--- a/include/linux/platform_data/ti-sysc.h
+++ b/include/linux/platform_data/ti-sysc.h
@@ -49,6 +49,7 @@ struct sysc_regbits {
s8 emufree_shift;
};
+#define SYSC_QUIRK_FORCE_MSTANDBY BIT(20)
#define SYSC_MODULE_QUIRK_AESS BIT(19)
#define SYSC_MODULE_QUIRK_SGX BIT(18)
#define SYSC_MODULE_QUIRK_HDQ1W BIT(17)
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