diff options
| -rw-r--r-- | arch/s390/include/asm/fpu-insn.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/s390/include/asm/fpu-insn.h b/arch/s390/include/asm/fpu-insn.h index bbf782a2965d..c1e2e521d9af 100644 --- a/arch/s390/include/asm/fpu-insn.h +++ b/arch/s390/include/asm/fpu-insn.h @@ -167,6 +167,22 @@ static __always_inline void fpu_vesravb(u8 v1, u8 v2, u8 v3) : "memory"); } +static __always_inline void fpu_vgfmag(u8 v1, u8 v2, u8 v3, u8 v4) +{ + asm volatile("VGFMAG %[v1],%[v2],%[v3],%[v4]" + : + : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3), [v4] "I" (v4) + : "memory"); +} + +static __always_inline void fpu_vgfmg(u8 v1, u8 v2, u8 v3) +{ + asm volatile("VGFMG %[v1],%[v2],%[v3]" + : + : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) + : "memory"); +} + #ifdef CONFIG_CC_IS_CLANG static __always_inline void fpu_vl(u8 v1, const void *vxr) @@ -195,6 +211,22 @@ static __always_inline void fpu_vl(u8 v1, const void *vxr) #endif /* CONFIG_CC_IS_CLANG */ +static __always_inline void fpu_vleib(u8 v, s16 val, u8 index) +{ + asm volatile("VLEIB %[v],%[val],%[index]" + : + : [v] "I" (v), [val] "K" (val), [index] "I" (index) + : "memory"); +} + +static __always_inline void fpu_vleig(u8 v, s16 val, u8 index) +{ + asm volatile("VLEIG %[v],%[val],%[index]" + : + : [v] "I" (v), [val] "K" (val), [index] "I" (index) + : "memory"); +} + static __always_inline u64 fpu_vlgvf(u8 v, u16 index) { u64 val; @@ -306,6 +338,14 @@ static __always_inline void fpu_vn(u8 v1, u8 v2, u8 v3) : "memory"); } +static __always_inline void fpu_vperm(u8 v1, u8 v2, u8 v3, u8 v4) +{ + asm volatile("VPERM %[v1],%[v2],%[v3],%[v4]" + : + : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3), [v4] "I" (v4) + : "memory"); +} + static __always_inline void fpu_vrepib(u8 v1, s16 i2) { asm volatile("VREPIB %[v1],%[i2]" @@ -314,6 +354,14 @@ static __always_inline void fpu_vrepib(u8 v1, s16 i2) : "memory"); } +static __always_inline void fpu_vsrlb(u8 v1, u8 v2, u8 v3) +{ + asm volatile("VSRLB %[v1],%[v2],%[v3]" + : + : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) + : "memory"); +} + #ifdef CONFIG_CC_IS_CLANG static __always_inline void fpu_vst(u8 v1, const void *vxr) @@ -410,6 +458,14 @@ static __always_inline void fpu_vstl(u8 v1, u32 index, const void *vxr) #endif /* CONFIG_CC_IS_CLANG */ +static __always_inline void fpu_vupllf(u8 v1, u8 v2) +{ + asm volatile("VUPLLF %[v1],%[v2]" + : + : [v1] "I" (v1), [v2] "I" (v2) + : "memory"); +} + static __always_inline void fpu_vx(u8 v1, u8 v2, u8 v3) { asm volatile("VX %[v1],%[v2],%[v3]" |