diff options
| -rw-r--r-- | drivers/gpu/drm/xe/xe_device_types.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_migrate.c | 34 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pci.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pci_types.h | 1 |
4 files changed, 21 insertions, 18 deletions
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index d748d71bb536..aa9935ff6d84 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -228,8 +228,6 @@ struct xe_device { u8 has_llc:1; /** @has_range_tlb_invalidation: Has range based TLB invalidations */ u8 has_range_tlb_invalidation:1; - /** @has_link_copy_engines: Whether the platform has link copy engines */ - u8 has_link_copy_engine:1; } info; /** @irq: device interrupt state */ diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c index 713f98baf0ee..2d31e6ff72ea 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -854,28 +854,36 @@ static void emit_clear_main_copy(struct xe_gt *gt, struct xe_bb *bb, bb->len += len; } -static u32 emit_clear_cmd_len(struct xe_device *xe) +static bool has_service_copy_support(struct xe_gt *gt) { - if (xe->info.has_link_copy_engine) + /* + * What we care about is whether the architecture was designed with + * service copy functionality (specifically the new MEM_SET / MEM_COPY + * instructions) so check the architectural engine list rather than the + * actual list since these instructions are usable on BCS0 even if + * all of the actual service copy engines (BCS1-BCS8) have been fused + * off. + */ + return gt->info.__engine_mask & GENMASK(XE_HW_ENGINE_BCS8, + XE_HW_ENGINE_BCS1); +} + +static u32 emit_clear_cmd_len(struct xe_gt *gt) +{ + if (has_service_copy_support(gt)) return PVC_MEM_SET_CMD_LEN_DW; else return XY_FAST_COLOR_BLT_DW; } -static int emit_clear(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs, - u32 size, u32 pitch, bool is_vram) +static void emit_clear(struct xe_gt *gt, struct xe_bb *bb, u64 src_ofs, + u32 size, u32 pitch, bool is_vram) { - struct xe_device *xe = gt_to_xe(gt); - - if (xe->info.has_link_copy_engine) { + if (has_service_copy_support(gt)) emit_clear_link_copy(gt, bb, src_ofs, size, pitch); - - } else { + else emit_clear_main_copy(gt, bb, src_ofs, size, pitch, is_vram); - } - - return 0; } /** @@ -928,7 +936,7 @@ struct dma_fence *xe_migrate_clear(struct xe_migrate *m, batch_size = 2 + pte_update_size(m, clear_vram, src, &src_it, &clear_L0, &clear_L0_ofs, &clear_L0_pt, - emit_clear_cmd_len(xe), 0, + emit_clear_cmd_len(gt), 0, NUM_PT_PER_BLIT); if (xe_device_has_flat_ccs(xe) && clear_vram) batch_size += EMIT_COPY_CCS_DW; diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index 7e018ee9db40..fd8d7eddd6f6 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -132,7 +132,6 @@ static const struct xe_graphics_desc graphics_xehpc = { .has_asid = 1, .has_flat_ccs = 0, - .has_link_copy_engine = 1, .supports_usm = 1, }; @@ -556,7 +555,6 @@ static int xe_info_init(struct xe_device *xe, xe->info.has_asid = graphics_desc->has_asid; xe->info.has_flat_ccs = graphics_desc->has_flat_ccs; xe->info.has_range_tlb_invalidation = graphics_desc->has_range_tlb_invalidation; - xe->info.has_link_copy_engine = graphics_desc->has_link_copy_engine; /* * All platforms have at least one primary GT. Any platform with media diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h index df6ddbc52d7f..bd0b0d87413e 100644 --- a/drivers/gpu/drm/xe/xe_pci_types.h +++ b/drivers/gpu/drm/xe/xe_pci_types.h @@ -24,7 +24,6 @@ struct xe_graphics_desc { u8 has_asid:1; u8 has_flat_ccs:1; - u8 has_link_copy_engine:1; u8 has_range_tlb_invalidation:1; u8 supports_usm:1; }; |