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authorRoy Spliet <[email protected]>2011-11-25 15:52:22 +0100
committerBen Skeggs <[email protected]>2012-03-13 17:06:26 +1000
commitbfb314652430ceca302bae0981d00903f055eee4 (patch)
tree539d40f333d17c6d1789504297d95fe505e192b1 /usr
parentb0103747094b62231fc951dfaca4897f67670874 (diff)
drm/nouveau/pm: improve memory timing generation
- Rename several VBIOS entries to closer match the real world - Add the missing 0x100238 and 0x100240 register values - Parse bit 14 of the VBIOS timing table - "Magic value" -> tCWL, fixing some minor bugs in the process - Also name a few more by their name rather than their number. - Some values seem to be dependent on the memory type. Fix Edits by Martin Peres <[email protected]>: - this is a squash commit - reworked for fixing some style issues Signed-off-by: Roy Spliet <[email protected]> Signed-off-by: Martin Peres <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
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