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| author | Eliav Bar-ilan <eliavb@nvidia.com> | 2024-09-10 16:44:16 -0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2024-09-12 09:20:18 +0200 |
| commit | 8386207f37e98453e1de3f51e50eeeea089103f9 (patch) | |
| tree | d7a00911af6b5c5a6dd4c739eaa4aff2ab381392 /usr | |
| parent | da3ea35007d0af457a0afc87e84fddaebc4e0b63 (diff) | |
iommu/amd: Fix argument order in amd_iommu_dev_flush_pasid_all()
An incorrect argument order calling amd_iommu_dev_flush_pasid_pages()
causes improper flushing of the IOMMU, leaving the old value of GCR3 from
a previous process attached to the same PASID.
The function has the signature:
void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
ioasid_t pasid, u64 address, size_t size)
Correct the argument order.
Cc: stable@vger.kernel.org
Fixes: 474bf01ed9f0 ("iommu/amd: Add support for device based TLB invalidation")
Signed-off-by: Eliav Bar-ilan <eliavb@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Link: https://lore.kernel.org/r/0-v1-fc6bc37d8208+250b-amd_pasid_flush_jgg@nvidia.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'usr')
0 files changed, 0 insertions, 0 deletions