dt-bindings: clk: document PolarFire SoC fabric clocks

On PolarFire SoC there are 4 PLL/DLL blocks, located in each of the
ordinal corners of the chip, which our documentation refers to as
"Clock Conditioning Circuitry". PolarFire SoC is an FPGA, these are
highly configurable & many of the input clocks are optional.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Signed-off-by: Claudiu Beznea <[email protected]>
Link: https://lore.kernel.org/r/[email protected]

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