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authorMark Brown <[email protected]>2021-05-18 17:24:52 +0100
committerMark Brown <[email protected]>2021-05-18 17:24:52 +0100
commitc37fe6aff89cb0d842993fe2f69e48bf3ebe0ab0 (patch)
tree2a322c48218f7006bab789b7bf16ec58b129a096 /tools/testing/selftests/powerpc/alignment/alignment_handler.c
parentd7aed20d446d8c87f5e13adf73281056b0064a45 (diff)
parentd07f6ca923ea0927a1024dfccafc5b53b61cfecc (diff)
Merge tag 'v5.13-rc2' into spi-5.13
Linux 5.13-rc2
Diffstat (limited to 'tools/testing/selftests/powerpc/alignment/alignment_handler.c')
-rw-r--r--tools/testing/selftests/powerpc/alignment/alignment_handler.c11
1 files changed, 1 insertions, 10 deletions
diff --git a/tools/testing/selftests/powerpc/alignment/alignment_handler.c b/tools/testing/selftests/powerpc/alignment/alignment_handler.c
index c25cf7cd45e9..33ee34fc0828 100644
--- a/tools/testing/selftests/powerpc/alignment/alignment_handler.c
+++ b/tools/testing/selftests/powerpc/alignment/alignment_handler.c
@@ -10,16 +10,7 @@
*
* We create two sets of source and destination buffers, one in regular memory,
* the other cache-inhibited (by default we use /dev/fb0 for this, but an
- * alterative path for cache-inhibited memory may be provided).
- *
- * One way to get cache-inhibited memory is to use the "mem" kernel parameter
- * to limit the kernel to less memory than actually exists. Addresses above
- * the limit may still be accessed but will be treated as cache-inhibited. For
- * example, if there is actually 4GB of memory and the parameter "mem=3GB" is
- * used, memory from address 0xC0000000 onwards is treated as cache-inhibited.
- * To access this region /dev/mem is used. The kernel should be configured
- * without CONFIG_STRICT_DEVMEM. In this case use:
- * ./alignment_handler /dev/mem 0xc0000000
+ * alterative path for cache-inhibited memory may be provided, e.g. memtrace).
*
* We initialise the source buffers, then use whichever set of load/store
* instructions is under test to copy bytes from the source buffers to the