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| author | Konrad Dybcio <[email protected]> | 2023-05-17 04:18:49 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-05-24 21:11:19 -0700 |
| commit | b317cebff59d9994ba041240654acb3c06b2f1f0 (patch) | |
| tree | 4a15e4955853bb290a15f65e0a689b80cb28d730 /tools/testing/selftests/net/lib/py/utils.py | |
| parent | 4a08af2f22ba3c2fb26287dc27fa07bf298acb34 (diff) | |
dt-bindings: cache: qcom,llcc: Fix SM8550 description
SM8550 (LLCCv4.1) has 4 register regions, this was not described
between its addition and the restructurization that happened in
the commit referenced in the fixes tag.
Fix it.
Fixes: 43aa006e074c ("dt-bindings: arm: msm: Fix register regions used for LLCC banks")
Signed-off-by: Konrad Dybcio <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/testing/selftests/net/lib/py/utils.py')
0 files changed, 0 insertions, 0 deletions