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authorJarkko Nikula <[email protected]>2023-09-21 08:57:03 +0300
committerAlexandre Belloni <[email protected]>2023-09-25 23:35:14 +0200
commit3521fa63c1ee7414e6ba0fdf98b82b07939147d9 (patch)
tree003525bf3b124c75a8ae1a66a39dd5daa91763ca /tools/testing/selftests/bpf/progs/test_autoload.c
parent4c36f656b7d1fc00643730c5845c19b3e15be856 (diff)
i3c: mipi-i3c-hci: Resume controller explicitly
On an HW I'm using in enabling work the RESUME bit is not set in the HC_CONTROLLER register when Host Controller goes to halt state. Value 1 should mean controller is suspended when reading and writing 1 resumes it. Because of this erratic behaviour plain HC_CONTROL read and write back won't resume the controller. Therefore do it by setting the RESUME bit explicitly. Signed-off-by: Jarkko Nikula <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexandre Belloni <[email protected]>
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