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| author | Dmitry Baryshkov <[email protected]> | 2024-08-04 08:40:07 +0300 |
|---|---|---|
| committer | Dmitry Baryshkov <[email protected]> | 2024-09-02 02:53:44 +0300 |
| commit | 1328cb7c34bf6d056df9ff694ee5194537548258 (patch) | |
| tree | fb62abb587f4dbe961d48f51854d168fd38a9829 /tools/testing/selftests/bpf/progs/test_autoload.c | |
| parent | c7c412202623951dcfc22316f5255fd84fd56186 (diff) | |
drm/msm/dsi: correct programming sequence for SM8350 / SM8450
According to the display-drivers, 5nm DSI PLL (v4.2, v4.3) have
different boundaries for pll_clock_inverters programming. Follow the
vendor code and use correct values.
Fixes: 2f9ae4e395ed ("drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450")
Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Abhinav Kumar <[email protected]>
Patchwork: https://patchwork.freedesktop.org/patch/606947/
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/testing/selftests/bpf/progs/test_autoload.c')
0 files changed, 0 insertions, 0 deletions