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authorKan Liang <[email protected]>2021-06-30 14:08:33 -0700
committerPeter Zijlstra <[email protected]>2021-07-02 15:58:39 +0200
commitda5a9156cd2a3be2b00f8defb529ee3e35e5769b (patch)
treebcbadc5d7dd802f839bd692f012c4b63e0a832ec /tools/testing/selftests/bpf/prog_tests/prog_array_init.c
parentf57191edaaeb01279a88ace1be5b7230bdd8c0ab (diff)
perf/x86/intel/uncore: Add Sapphire Rapids server UPI support
Sapphire Rapids uses a coherent interconnect for scaling to multiple sockets known as Intel UPI. Intel UPI technology provides a cache coherent socket to socket external communication interface between processors. The layout of the control registers for a UPI uncore unit is similar to a M2M uncore unit. Signed-off-by: Kan Liang <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Reviewed-by: Andi Kleen <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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