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| author | Jiawen Wu <jiawenwu@trustnetic.com> | 2023-06-06 17:21:06 +0800 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2023-06-08 13:25:10 +0200 |
| commit | 854cace61387b6f60734d9ec254443a6894c480d (patch) | |
| tree | 4e9e8ea0bf46ccea1640c39145806d6548b5894c /tools/testing/selftests/bpf/prog_tests/module_attach.c | |
| parent | af8de1e307bf1ecbd17d220122832cd093f7a3f8 (diff) | |
net: txgbe: Implement phylink pcs
Register MDIO bus for PCS layer to use Synopsys designware XPCS, support
10GBASE-R interface to the controller.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/testing/selftests/bpf/prog_tests/module_attach.c')
0 files changed, 0 insertions, 0 deletions