diff options
| author | Xingyu Wu <xingyu.wu@starfivetech.com> | 2023-07-13 19:38:56 +0800 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-07-19 18:08:00 +0100 |
| commit | 9b3938c0b81e79e1c0e1a3e95be3e12efd8c771b (patch) | |
| tree | be1dd5142a92968b5756b99893f4f69ea145dc0d /tools/testing/selftests/bpf/prog_tests/autoload.c | |
| parent | 14b14a57e642e0dab9be4e9d0866fb2c4332f7c5 (diff) | |
dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator
Add bindings for the Image-Signal-Process clock and reset
generator (ISPCRG) on the JH7110 RISC-V SoC by StarFive Ltd.
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/testing/selftests/bpf/prog_tests/autoload.c')
0 files changed, 0 insertions, 0 deletions