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authorYong-Xuan Wang <[email protected]>2024-07-26 16:49:26 +0800
committerAnup Patel <[email protected]>2024-11-21 17:40:06 +0530
commit94a7734d0967e89fac5be1fd5115f5194e4a4017 (patch)
tree144a5cec81cd175c97b5eb84df576f2b1dbdd9f9 /tools/testing/selftests/bpf/prog_tests/autoload.c
parent332fa4a802b16ccb727199da685294f85f9880cb (diff)
RISC-V: Add Svade and Svadu Extensions Support
Svade and Svadu extensions represent two schemes for managing the PTE A/D bits. When the PTE A/D bits need to be set, Svade extension intdicates that a related page fault will be raised. In contrast, the Svadu extension supports hardware updating of PTE A/D bits. Since the Svade extension is mandatory and the Svadu extension is optional in RVA23 profile, by default the M-mode firmware will enable the Svadu extension in the menvcfg CSR when only Svadu is present in DT. This patch detects Svade and Svadu extensions from DT and adds arch_has_hw_pte_young() to enable optimization in MGLRU and __wp_page_copy_user() when we have the PTE A/D bits hardware updating support. Co-developed-by: Jinyu Tang <[email protected]> Signed-off-by: Jinyu Tang <[email protected]> Signed-off-by: Yong-Xuan Wang <[email protected]> Reviewed-by: Andrew Jones <[email protected]> Reviewed-by: Alexandre Ghiti <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]>
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