aboutsummaryrefslogtreecommitdiff
path: root/tools/testing/cxl/test
diff options
context:
space:
mode:
authorDan Williams <[email protected]>2022-01-31 18:10:04 -0800
committerDan Williams <[email protected]>2022-02-08 22:57:30 -0800
commit98d2d3a264543680281fd8a4e6ae490ca26b4f85 (patch)
tree1ce89bb626619b06338215017fa821a0998f1590 /tools/testing/cxl/test
parentaf9cae9facc2de773b4aa59916913cfd6e18bdd0 (diff)
cxl/core: Generalize dport enumeration in the core
The core houses infrastructure for decoder resources. A CXL port's dports are more closely related to decoder infrastructure than topology enumeration. Implement generic PCI based dport enumeration in the core, i.e. arrange for existing root port enumeration from cxl_acpi to share code with switch port enumeration which just amounts to a small difference in a pci_walk_bus() invocation once the appropriate 'struct pci_bus' has been retrieved. Set the convention that decoder objects are registered after all dports are enumerated. This enables userspace to know when the CXL core is finished establishing 'dportX' links underneath the 'portX' object. Reviewed-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/164368114191.354031.5270501846455462665.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <[email protected]>
Diffstat (limited to 'tools/testing/cxl/test')
-rw-r--r--tools/testing/cxl/test/cxl.c67
-rw-r--r--tools/testing/cxl/test/mock.c45
-rw-r--r--tools/testing/cxl/test/mock.h6
3 files changed, 69 insertions, 49 deletions
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
index 736d99006fb7..ef002e909d38 100644
--- a/tools/testing/cxl/test/cxl.c
+++ b/tools/testing/cxl/test/cxl.c
@@ -317,6 +317,19 @@ static bool is_mock_bridge(struct device *dev)
for (i = 0; i < ARRAY_SIZE(cxl_host_bridge); i++)
if (dev == &cxl_host_bridge[i]->dev)
return true;
+ return false;
+}
+
+static bool is_mock_port(struct device *dev)
+{
+ int i;
+
+ if (is_mock_bridge(dev))
+ return true;
+
+ for (i = 0; i < ARRAY_SIZE(cxl_root_port); i++)
+ if (dev == &cxl_root_port[i]->dev)
+ return true;
return false;
}
@@ -366,26 +379,6 @@ static struct acpi_pci_root mock_pci_root[NR_CXL_HOST_BRIDGES] = {
},
};
-static struct platform_device *mock_cxl_root_port(struct pci_bus *bus, int index)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(mock_pci_bus); i++)
- if (bus == &mock_pci_bus[i])
- return cxl_root_port[index + i * NR_CXL_ROOT_PORTS];
- return NULL;
-}
-
-static bool is_mock_port(struct platform_device *pdev)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(cxl_root_port); i++)
- if (pdev == cxl_root_port[i])
- return true;
- return false;
-}
-
static bool is_mock_bus(struct pci_bus *bus)
{
int i;
@@ -405,16 +398,47 @@ static struct acpi_pci_root *mock_acpi_pci_find_root(acpi_handle handle)
return &mock_pci_root[host_bridge_index(adev)];
}
+static int mock_cxl_port_enumerate_dports(struct device *host,
+ struct cxl_port *port)
+{
+ struct device *dev = &port->dev;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(cxl_root_port); i++) {
+ struct platform_device *pdev = cxl_root_port[i];
+ struct cxl_dport *dport;
+
+ if (pdev->dev.parent != port->uport)
+ continue;
+
+ cxl_device_lock(&port->dev);
+ dport = devm_cxl_add_dport(host, port, &pdev->dev, pdev->id,
+ CXL_RESOURCE_NONE);
+ cxl_device_unlock(&port->dev);
+
+ if (IS_ERR(dport)) {
+ dev_err(dev, "failed to add dport: %s (%ld)\n",
+ dev_name(&pdev->dev), PTR_ERR(dport));
+ return PTR_ERR(dport);
+ }
+
+ dev_dbg(dev, "add dport%d: %s\n", pdev->id,
+ dev_name(&pdev->dev));
+ }
+
+ return 0;
+}
+
static struct cxl_mock_ops cxl_mock_ops = {
.is_mock_adev = is_mock_adev,
.is_mock_bridge = is_mock_bridge,
.is_mock_bus = is_mock_bus,
.is_mock_port = is_mock_port,
.is_mock_dev = is_mock_dev,
- .mock_port = mock_cxl_root_port,
.acpi_table_parse_cedt = mock_acpi_table_parse_cedt,
.acpi_evaluate_integer = mock_acpi_evaluate_integer,
.acpi_pci_find_root = mock_acpi_pci_find_root,
+ .devm_cxl_port_enumerate_dports = mock_cxl_port_enumerate_dports,
.list = LIST_HEAD_INIT(cxl_mock_ops.list),
};
@@ -598,3 +622,4 @@ module_init(cxl_test_init);
module_exit(cxl_test_exit);
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(ACPI);
+MODULE_IMPORT_NS(CXL);
diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c
index 17408f892df4..56b4b7d734bc 100644
--- a/tools/testing/cxl/test/mock.c
+++ b/tools/testing/cxl/test/mock.c
@@ -7,6 +7,8 @@
#include <linux/export.h>
#include <linux/acpi.h>
#include <linux/pci.h>
+#include <cxlmem.h>
+#include <cxlpci.h>
#include "mock.h"
static LIST_HEAD(mock);
@@ -114,32 +116,6 @@ struct acpi_pci_root *__wrap_acpi_pci_find_root(acpi_handle handle)
}
EXPORT_SYMBOL_GPL(__wrap_acpi_pci_find_root);
-void __wrap_pci_walk_bus(struct pci_bus *bus,
- int (*cb)(struct pci_dev *, void *), void *userdata)
-{
- int index;
- struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
-
- if (ops && ops->is_mock_bus(bus)) {
- int rc, i;
-
- /*
- * Simulate 2 root ports per host-bridge and no
- * depth recursion.
- */
- for (i = 0; i < 2; i++) {
- rc = cb((struct pci_dev *) ops->mock_port(bus, i),
- userdata);
- if (rc)
- break;
- }
- } else
- pci_walk_bus(bus, cb, userdata);
-
- put_cxl_mock_ops(index);
-}
-EXPORT_SYMBOL_GPL(__wrap_pci_walk_bus);
-
struct nvdimm_bus *
__wrap_nvdimm_bus_register(struct device *dev,
struct nvdimm_bus_descriptor *nd_desc)
@@ -155,5 +131,22 @@ __wrap_nvdimm_bus_register(struct device *dev,
}
EXPORT_SYMBOL_GPL(__wrap_nvdimm_bus_register);
+int __wrap_devm_cxl_port_enumerate_dports(struct device *host,
+ struct cxl_port *port)
+{
+ int rc, index;
+ struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
+
+ if (ops && ops->is_mock_port(port->uport))
+ rc = ops->devm_cxl_port_enumerate_dports(host, port);
+ else
+ rc = devm_cxl_port_enumerate_dports(host, port);
+ put_cxl_mock_ops(index);
+
+ return rc;
+}
+EXPORT_SYMBOL_NS_GPL(__wrap_devm_cxl_port_enumerate_dports, CXL);
+
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS(ACPI);
+MODULE_IMPORT_NS(CXL);
diff --git a/tools/testing/cxl/test/mock.h b/tools/testing/cxl/test/mock.h
index 15ed0fd877e4..99e7ff38090d 100644
--- a/tools/testing/cxl/test/mock.h
+++ b/tools/testing/cxl/test/mock.h
@@ -2,6 +2,7 @@
#include <linux/list.h>
#include <linux/acpi.h>
+#include <cxl.h>
struct cxl_mock_ops {
struct list_head list;
@@ -15,10 +16,11 @@ struct cxl_mock_ops {
struct acpi_object_list *arguments,
unsigned long long *data);
struct acpi_pci_root *(*acpi_pci_find_root)(acpi_handle handle);
- struct platform_device *(*mock_port)(struct pci_bus *bus, int index);
bool (*is_mock_bus)(struct pci_bus *bus);
- bool (*is_mock_port)(struct platform_device *pdev);
+ bool (*is_mock_port)(struct device *dev);
bool (*is_mock_dev)(struct device *dev);
+ int (*devm_cxl_port_enumerate_dports)(struct device *host,
+ struct cxl_port *port);
};
void register_cxl_mock_ops(struct cxl_mock_ops *ops);