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author | Jonathan Austin <[email protected]> | 2016-08-30 17:31:22 +0100 |
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committer | Russell King <[email protected]> | 2016-09-06 15:51:08 +0100 |
commit | bc0ee9d24ad21a5c2b5944f66623a02e9c8831aa (patch) | |
tree | 8bcff63e1b50e2d1c7211935092cff827867cded /tools/perf/util/trace-event-scripting.c | |
parent | 9a1af5f2206bd303ed201c6895c42ac3ac120a20 (diff) |
ARM: 8607/1: V7M: Wire up caches for V7M processors with cache support.
This patch does the plumbing required to invoke the V7M cache code added
in earlier patches in this series, although there is no users for that
yet.
In order to honour the I/D cache disable config options, this patch changes
the mechanism by which the CCR is set on boot, to be more like V7A/R.
Signed-off-by: Jonathan Austin <[email protected]>
Signed-off-by: Vladimir Murzin <[email protected]>
Tested-by: Andras Szemzo <[email protected]>
Tested-by: Joachim Eastwood <[email protected]>
Tested-by: Alexandre TORGUE <[email protected]>
Signed-off-by: Russell King <[email protected]>
Diffstat (limited to 'tools/perf/util/trace-event-scripting.c')
0 files changed, 0 insertions, 0 deletions