diff options
| author | Jim Quinlan <[email protected]> | 2013-11-27 15:34:50 -0500 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2014-03-20 13:46:15 +0100 |
| commit | 71ca75888953166b72cf7a65b4c2b6a50fc0ce3b (patch) | |
| tree | 3b74c1898d1c6772c7c23c9eab21d3b6a99c39c9 /tools/perf/util/trace-event-scripting.c | |
| parent | 2eddb708d83ead02b5d41c65bfb26bab5afc8210 (diff) | |
MIPS: Make local_irq_disable macro safe for non-Mipsr2
For non-mipsr2 processors, the local_irq_disable contains an mfc0-mtc0
pair with instructions inbetween. With preemption enabled, this sequence
may get preempted and effect a stale value of CP0_STATUS when executing
the mtc0 instruction. This commit avoids this scenario by incrementing
the preempt count before the mfc0 and decrementing it after the mtc9.
[[email protected]: This patch is sorting out the part that were missed
by e97c5b6098 [MIPS: Make irqflags.h functions preempt-safe for non-mipsr2
cpus.] I also re-enabled the inclusion of <asm/asm-offsets.h> at the top
of <asm/asmmacro.h>].
Signed-off-by: Jim Quinlan <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/6164/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'tools/perf/util/trace-event-scripting.c')
0 files changed, 0 insertions, 0 deletions