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| author | Grygorii Strashko <[email protected]> | 2019-11-18 14:20:16 +0200 |
|---|---|---|
| committer | Tony Lindgren <[email protected]> | 2019-11-20 09:42:33 -0800 |
| commit | 6af0a549c25e0d02366aa95507bfe3cad2f7b68b (patch) | |
| tree | 6d6f56161a8d6bc9cd08cbbbbc8e0328d2864ab1 /tools/perf/util/trace-event-scripting.c | |
| parent | e415e4d2d506ce64ea540b4552654d1be0680a52 (diff) | |
ARM: dts: dra7: fix cpsw mdio fck clock
The DRA7 CPSW MDIO functional clock (gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0)
is specified incorrectly, which is caused incorrect MDIO bus clock
configuration MDCLK. The correct CPSW MDIO functional clock is
gmac_main_clk (125MHz), which is the same as CPSW fck. Hence fix it.
Fixes: 1faa415c9c6e ("ARM: dts: Add fck for cpsw mdio for omap variants")
Signed-off-by: Grygorii Strashko <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
Diffstat (limited to 'tools/perf/util/trace-event-scripting.c')
0 files changed, 0 insertions, 0 deletions