diff options
| author | Krzysztof Kozlowski <[email protected]> | 2016-09-04 13:04:16 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2016-09-16 13:32:13 +0200 |
| commit | 5e49773f8703a0b376cdcfd6b26fadf18485f26b (patch) | |
| tree | 66462ad29f0d79770d3a5783812c80b1bc2cc1b1 /tools/perf/util/trace-event-scripting.c | |
| parent | f7061ffb44116490f282f130a220ca2d10849248 (diff) | |
ARM: dts: exynos: Fix mismatched values of SD drive strengh configuration on exynos4415
The pinctrl drive strength register on exynos4415 is 2-bit wide for each
pin. The pins for SD2 were configured with value of 4. The driver does
not validate the value so this overflow effectively set a bit 1 in
adjacent pins thus configuring them to drive strength 2x.
The author's intention was probably to set drive strength of 4x.
All other SD pins are configured with drive strength of 4x. Fix these
with same pattern.
Fixes: 9246e7ff24c5 ("ARM: dts: Add dts files for exynos4415 SoC")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Javier Martinez Canillas <[email protected]>
Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Diffstat (limited to 'tools/perf/util/trace-event-scripting.c')
0 files changed, 0 insertions, 0 deletions