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| author | Stefan Agner <[email protected]> | 2018-06-28 09:31:36 +0200 |
|---|---|---|
| committer | Ulf Hansson <[email protected]> | 2018-07-16 11:21:45 +0200 |
| commit | 09c8192be713a30ace01ac00a90bc3361b7fcd12 (patch) | |
| tree | a8a17daafd67626d7f62a35309f8dab088accceb /tools/perf/util/trace-event-scripting.c | |
| parent | 29772f8a73d88a5de648177d9d822055ab7d1ba6 (diff) | |
mmc: sdhci-esdhc-imx: support eMMC DDR mode when running at 3.3V
The uSDHC supports DDR modes for eMMC devices running at 3.3V. This
allows to run eMMC with 3.3V signaling voltage at DDR52 mode:
# cat /sys/kernel/debug/mmc1/ios
clock: 52000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 8 (mmc DDR52)
signal voltage: 0 (3.30 V)
driver type: 0 (driver type B)
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>
Diffstat (limited to 'tools/perf/util/trace-event-scripting.c')
0 files changed, 0 insertions, 0 deletions