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authorAlexandre Ghiti <[email protected]>2023-07-04 14:18:37 +0200
committerPalmer Dabbelt <[email protected]>2023-08-04 10:28:04 -0700
commitc3bcc65d4d2e8292c435322cbc34c318d06b8b6c (patch)
treeaba35b64f5469597e7f91bafbbbfb97db87db5bd /tools/perf/util/scripting-engines
parentf8069826eb4fe7ae7f769987abf527708354bfd5 (diff)
riscv: Start of DRAM should at least be aligned on PMD size for the direct mapping
So that we do not end up mapping the whole linear mapping using 4K pages, which is slow at boot time, and also very likely at runtime. So make sure we align the start of DRAM on a PMD boundary. Signed-off-by: Alexandre Ghiti <[email protected]> Reported-by: Song Shuai <[email protected]> Fixes: 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear mapping") Tested-by: Song Shuai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Cc: [email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines')
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