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authorVadim Pasternak <[email protected]>2016-11-16 15:20:43 +0100
committerDavid S. Miller <[email protected]>2016-11-16 23:29:04 -0500
commitc711e27a1851c5efe9eb43365d6a3ffaf6d5f37f (patch)
tree5b4f744f6eacd60b20535055ec4c3012f941019f /tools/perf/util/scripting-engines/trace-event-python.c
parentd01eb808c7b8bf2faf89901f1fddfa836d330057 (diff)
mlxsw: Add bus capability flag
The mlxsw core infrastructure currently assumes that communication with the ASIC is always possible using Ethernet management datagrams (EMADs), but this is only possible when the PCI bus is used. The bus capability flag is added to indicate EMAD support and make core initialize EMAD communication only when it's set. Otherwise, register access is done using command interface. Signed-off-by: Vadim Pasternak <[email protected]> Reviewed-by: Ido Schimmel <[email protected]> Signed-off-by: Jiri Pirko <[email protected]> Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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