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| author | Kevin Hilman <[email protected]> | 2024-10-07 08:08:58 +0200 |
|---|---|---|
| committer | Nishanth Menon <[email protected]> | 2024-10-25 10:45:07 -0500 |
| commit | a7a15754c7f70a833ffeb9ad996b358924f10305 (patch) | |
| tree | 5020f42f6bf4947c91301dd173c945338bd6e692 /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | 60357991f6b9d4bd4dc442a368da3f468cfa4903 (diff) | |
firmware: ti_sci: add CPU latency constraint management
During system-wide suspend, check if any of the CPUs have PM QoS
resume latency constraints set. If so, set TI SCI constraint.
TI SCI has a single system-wide latency constraint, so use the max of
any of the CPU latencies as the system-wide value.
Note: DM firmware clears all constraints at resume time, so
constraints need to be checked/updated/sent at each system suspend.
Co-developed-by: Vibhore Vardhan <[email protected]>
Signed-off-by: Vibhore Vardhan <[email protected]>
Reviewed-by: Dhruva Gole <[email protected]>
Signed-off-by: Dhruva Gole <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Tested-by: Dhruva Gole <[email protected]>
Signed-off-by: Markus Schneider-Pargmann <[email protected]>
Tested-by: Kevin Hilman <[email protected]>
Tested-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions