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authorHans de Goede <[email protected]>2021-01-20 22:49:56 +0100
committerMark Brown <[email protected]>2021-02-08 15:13:08 +0000
commit8ade6d8b02b1ead741bd4f6c42921035caab6560 (patch)
tree1ce4284c6c867ec37b5a7bdc96c7af5e596a0bbd /tools/perf/util/scripting-engines/trace-event-python.c
parent017131e056dec60b2195c33039e34cb4f2d5bd7f (diff)
ASoC: Intel: Add DMI quirk table to soc_intel_is_byt_cr()
Some Bay Trail systems: 1. Use a non CR version of the Bay Trail SoC 2. Contain at least 6 interrupt resources so that the platform_get_resource(pdev, IORESOURCE_IRQ, 5) check to workaround non CR systems which list their IPC IRQ at index 0 despite being non CR does not work 3. Despite 1. and 2. still have their IPC IRQ at index 0 rather then 5 Add a DMI quirk table to check for the few known models with this issue, so that the right IPC IRQ index is used on these systems. Reviewed-by: Andy Shevchenko <[email protected]> Acked-by: Pierre-Louis Bossart <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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