diff options
author | Sekhar Nori <[email protected]> | 2018-05-25 13:11:45 -0500 |
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committer | Michael Turquette <[email protected]> | 2018-05-30 12:48:27 -0700 |
commit | 7f02f18e7f87831747aaa2685f63d16fb2649c6a (patch) | |
tree | adac6daea157c91d4db8fe86c582ebd4a9e26900 /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | 715478bb63ffd76cf90f6536be8592e3f6df9567 (diff) |
clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled
PLL2 SYSCLK1 on DM646x is connected to DDR2 PHY and cannot
be disabled. Mark it so to prevent unused clock disable
infrastructure from disabling it.
Signed-off-by: Sekhar Nori <[email protected]>
Reviewed-by: David Lechner <[email protected]>
Signed-off-by: Michael Turquette <[email protected]>
Link: lkml.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions