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authorRicardo Neri <[email protected]>2024-06-14 14:16:05 -0700
committerRafael J. Wysocki <[email protected]>2024-06-21 14:52:12 +0200
commit6ae0092ca7adfce79336c6525cb0da561ecd4f04 (patch)
treec6c8dc69d7e09227f69c920f78cc5ce836701cf7 /tools/perf/util/scripting-engines/trace-event-python.c
parent73abe7002eea73fa4c006249e1adb9dee3a8c79f (diff)
thermal: intel: intel_tcc: Add model checks for temperature registers
The register MSR_TEMPERATURE_TARGET is not architectural. Its fields may be defined differently for each processor model. TCC_OFFSET is an example of such case. Despite being specified as architectural, the registers IA32_[PACKAGE]_ THERM_STATUS have become model-specific: in recent processors, the digital temperature readout uses bits [23:16] whereas the Intel Software Developer's manual specifies bits [22:16]. Create an array of processor models and their bitmasks for TCC_OFFSET and the digital temperature readout fields. Do not include recent processors. Instead, use the bitmasks of these recent processors as default. Use these model-specific bitmasks when reading TCC_OFFSET or the temperature sensors. Initialize a model-specific data structure during subsys_initcall() to have it ready when thermal drivers are loaded. Expose the new interface intel_tcc_get_offset_mask(). The intel_tcc_cooling driver will use it. Reviewed-by: Zhang Rui <[email protected]> Signed-off-by: Ricardo Neri <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Rafael J. Wysocki <[email protected]>
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