diff options
author | Liu Gang-B34182 <[email protected]> | 2011-08-25 15:59:25 -0700 |
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committer | Linus Torvalds <[email protected]> | 2011-08-25 18:51:06 -0700 |
commit | 671ee7f0ce62e4b991b47fcf1c161c3f710dabbc (patch) | |
tree | 3f6d4343681051e5f68f17ab0068ccab0e834c96 /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | 62d1760180c84cba68cc83696fa0bde0593007bd (diff) |
arch/powerpc/sysdev/fsl_rio.c: correct IECSR register clear value
This bug causes the IECSR register clear failure. In this case, the RETE
(retry error threshold exceeded) interrupt will be generated and cannot be
cleared. So the related ISR may be called persistently.
The RETE bit in IECSR is cleared by writing a 1 to it.
Signed-off-by: Liu Gang <[email protected]>
Cc: Benjamin Herrenschmidt <[email protected]>
Cc: Kumar Gala <[email protected]>
Cc: <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions