aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/util/scripting-engines/trace-event-python.c
diff options
context:
space:
mode:
authorStephen Boyd <[email protected]>2012-09-05 12:28:51 -0700
committerDavid Brown <[email protected]>2012-09-13 11:14:29 -0700
commit66a8950949c12a2600ff62e78b24f42ef8f6d28e (patch)
treec348c8ba6bf082bafaa44e390f3129ce2dd45b4c /tools/perf/util/scripting-engines/trace-event-python.c
parente8ea1ea90bfd90d3047924b77a3f76cf2147ada1 (diff)
ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the PPIs to be edge triggered. Now that we have the percpu irq interface we don't need this code so let's remove it and update the percpu irq user (msm_timer) to set the irq type. Signed-off-by: Stephen Boyd <[email protected]> Signed-off-by: David Brown <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions