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authorStephane Eranian <[email protected]>2014-09-17 11:06:16 +0200
committerIngo Molnar <[email protected]>2014-09-24 14:48:25 +0200
commit521e8bac67a71a6544274f39d5c61473e0e54ac0 (patch)
treec5612d551c1cdc9423cceb6a5ea9f39331e63c32 /tools/perf/util/scripting-engines/trace-event-python.c
parentb10fc1c3e30c44033d1cb1d2900cc2ab06dff342 (diff)
perf/x86/intel/uncore: Update support for client uncore IMC PMU
This patch restructures the memory controller (IMC) uncore PMU support for client SNB/IVB/HSW processors. The main change is that it can now cope with more than one PCI device ID per processor model. There are many flavors of memory controllers for each processor. They have different PCI device ID, yet they behave the same w.r.t. the memory controller PMU that we are interested in. The patch now supports two distinct memory controllers for IVB processors: one for mobile, one for desktop. Signed-off-by: Stephane Eranian <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Link: http://lkml.kernel.org/r/20140917090616.GA11281@quad Cc: [email protected] Cc: [email protected] Cc: Arnaldo Carvalho de Melo <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: Linus Torvalds <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
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