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authorCatalin Marinas <[email protected]>2012-03-05 11:49:27 +0000
committerCatalin Marinas <[email protected]>2012-09-17 13:41:56 +0100
commit4f04d8f00545110a0e525ae2fb62ab38cb417236 (patch)
tree021c6ff01a972de47341959b0bd0888775c9ed7b /tools/perf/util/scripting-engines/trace-event-python.c
parent60ffc30d5652810dd34ea2eec41504222f5d5791 (diff)
arm64: MMU definitions
The virtual memory layout is described in Documentation/arm64/memory.txt. This patch adds the MMU definitions for the 4KB and 64KB translation table configurations. The SECTION_SIZE is 2MB with 4KB page and 512MB with 64KB page configuration. PHYS_OFFSET is calculated at run-time and stored in a variable (no run-time code patching at this stage). On the current implementation, both user and kernel address spaces are 512G (39-bit) each with a maximum of 256G for the RAM linear mapping. Linux uses 3 levels of translation tables with the 4K page configuration and 2 levels with the 64K configuration. Extending the memory space beyond 39-bit with the 4K pages or 42-bit with 64K pages requires an additional level of translation tables. The SPARSEMEM configuration is global to all AArch64 platforms and allows for 1GB sections with SPARSEMEM_VMEMMAP enabled by default. Signed-off-by: Will Deacon <[email protected]> Signed-off-by: Catalin Marinas <[email protected]> Acked-by: Tony Lindgren <[email protected]> Acked-by: Nicolas Pitre <[email protected]> Acked-by: Olof Johansson <[email protected]> Acked-by: Santosh Shilimkar <[email protected]> Acked-by: Arnd Bergmann <[email protected]>
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