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authorBorislav Petkov <[email protected]>2018-02-21 11:18:56 +0100
committerIngo Molnar <[email protected]>2018-02-21 17:00:54 +0100
commit4b1e84276a6172980c5bf39aa091ba13e90d6dad (patch)
tree32c103a79a5ac99c9d2c1fa00e76993599736e47 /tools/perf/util/scripting-engines/trace-event-python.c
parentb2fbf6f282147b42d669a4bd4a7b1de2e2d6a792 (diff)
x86/mce/AMD: Collect error info even if valid bits are not set
The MCA banks log error info into MCA_ADDR, MCA_MISC0, and MCA_SYND even if the corresponding valid bits are not set: "Error handlers should save the values in MCA_ADDR, MCA_MISC0, and MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and MCA_STATUS[SyndV] are zero." Do so by setting those bits so that code down the MCE processing path doesn't need to be changed. Signed-off-by: Borislav Petkov <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Tony Luck <[email protected]> Cc: linux-edac <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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