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authorAdam Ford <[email protected]>2021-02-07 12:51:38 -0600
committerStephen Boyd <[email protected]>2021-02-11 12:09:31 -0800
commit31e7aa7ed7393af6cb92a6c569738d4d50d7f6fc (patch)
tree53d3fc94a20b901b45bedf241660f758d00d9bd3 /tools/perf/util/scripting-engines/trace-event-python.c
parent5c8fe583cce542aa0b84adc939ce85293de36e5e (diff)
dt-bindings: clk: versaclock5: Add optional load capacitance property
There are two registers which can set the load capacitance for XTAL1 and XTAL2. These are optional registers when using an external crystal. Since XTAL1 and XTAL2 will set to the same value, update the binding to support a single property called xtal-load-femtofarads. Signed-off-by: Adam Ford <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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