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authorAurelien Jacquiot <[email protected]>2011-10-04 12:17:19 -0400
committerMark Salter <[email protected]>2011-10-06 19:47:37 -0400
commit14aa7e8bf6d84c9a42c48e7f93472d830f694b1e (patch)
tree6e7ee17817537ea8454d3e3793a37017139bfcf9 /tools/perf/util/scripting-engines/trace-event-python.c
parent041cadca7008f08fb4785f2288c8127c16faa529 (diff)
C6X: memory management and DMA support
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <[email protected]> The C6X architecture currently lacks an MMU so memory management is relatively simple. There is no bus snooping between L2 and main memory but coherent DMA memory is supported by making regions of main memory uncached. If such a region is desired, it can be specified on the commandline with a "memdma=" argument. Signed-off-by: Aurelien Jacquiot <[email protected]> Signed-off-by: Mark Salter <[email protected]> Acked-by: Arnd Bergmann <[email protected]>
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