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author | Pan Xiuli <[email protected]> | 2019-09-27 15:05:31 -0500 |
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committer | Mark Brown <[email protected]> | 2019-10-01 18:31:25 +0100 |
commit | 0a1b08345bc5d9214dc701f8ec5d67c473fab735 (patch) | |
tree | 290254dc86c6be914423be208c09ea7ae97ae06f /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | e66e52c5b7422824cedf0084c0766602dea7e8a7 (diff) |
ASoC: SOF: pcm: harden PCM STOP sequence
The old STOP sequence is: 1. stop DMA 2. send STOP ipc
If delay happen before the steps 1 and 2, the DMA buffer will be empty in
short time and cause pipeline xrun then stop the pipeline.
Then the step 2 ipc stop will return error as pipeline is already stopped.
Suggested change to avoid the issue is to switch the order of steps 1 and 2
for the stop sequence.
Signed-off-by: Pan Xiuli <[email protected]>
Signed-off-by: Pierre-Louis Bossart <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions