diff options
| author | Binghua Duan <[email protected]> | 2011-07-08 17:40:12 +0800 |
|---|---|---|
| committer | Barry Song <[email protected]> | 2011-07-09 07:19:28 +0800 |
| commit | 02c981c07bc95ac1e42ec6c817f0c28cf3fe993a (patch) | |
| tree | 3b0f9a368d7d3b4cef3eab9128a0c3d95e8188d4 /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | f1bb20a8365f6753e0f7b6e94981ca2b662bae13 (diff) | |
ARM: CSR: Adding CSR SiRFprimaII board support
SiRFprimaII is the latest generation application processor from CSR’s
Multifunction SoC product family. Designed around an ARM cortex A9 core,
high-speed memory bus, advanced 3D accelerator and full-HD multi-format
video decoder, SiRFprimaII is able to meet the needs of complicated
applications for modern multifunction devices that require heavy concurrent
applications and fluid user experience. Integrated with GPS baseband,
analog and PMU, this new platform is designed to provide a cost effective
solution for Automotive and Consumer markets.
This patch adds the basic support for this SoC and EVB board based on device
tree. It is following the ZYNQ of Xilinx in some degree.
Signed-off-by: Binghua Duan <[email protected]>
Signed-off-by: Rongjun Ying <[email protected]>
Signed-off-by: Zhiwu Song <[email protected]>
Signed-off-by: Yuping Luo <[email protected]>
Signed-off-by: Bin Shi <[email protected]>
Signed-off-by: Huayi Li <[email protected]>
Signed-off-by: Barry Song <[email protected]>
Reviewed-by: Arnd Bergmann <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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