diff options
| author | Kenji Kaneshige <[email protected]> | 2011-11-10 16:40:37 +0900 |
|---|---|---|
| committer | Jesse Barnes <[email protected]> | 2011-11-11 09:31:34 -0800 |
| commit | 0027cb3e1947d0f453fece40ed16764fb362bac6 (patch) | |
| tree | 3a41356b35bcf1a7bfe189602dcce524cd4bf2bf /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | fdbd3ce9efb3a045266f2f6b2f1b6047882ff092 (diff) | |
PCI: pciehp: wait 1000 ms before Link Training check
We need to wait for 1000 ms after Data Link Layer Link Active (DLLLA)
bit reads 1b before sending configuration request. Currently pciehp
does this wait after checking Link Training (LT) bit. But we need it
before checking LT bit because LT is still set even after DLLLA bit is
set on some platforms.
Acked-by: Yinghai Lu <[email protected]>
Tested-by: Yinghai Lu <[email protected]>
Signed-off-by: Kenji Kaneshige <[email protected]>
Signed-off-by: Jesse Barnes <[email protected]>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions