diff options
| author | Takeshi Kihara <[email protected]> | 2017-07-28 20:41:15 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2017-08-16 14:26:25 +0200 |
| commit | eada11ac23438d368fd431eb8e902caa96b80902 (patch) | |
| tree | 2f861719da447e0b6b310ce4ed3d42d11d54d7ad /tools/perf/util/c++/clang.cpp | |
| parent | 712f36fbb7738a60df0622e950726b6977dd41f3 (diff) | |
pinctrl: sh-pfc: r8a7795: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to MOD_SEL1 bit10
This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1
bit11 to MOD_SEL1 bit10.
This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.53E or later.
Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0")
Signed-off-by: Takeshi Kihara <[email protected]>
Signed-off-by: Yoshihiro Kaneko <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'tools/perf/util/c++/clang.cpp')
0 files changed, 0 insertions, 0 deletions